nb/amd/amdfam10: Fix incorrect channel buffer count configuration
The secondary bus number set code incorrectly overwrote the link buffer settings in F0x[F4,D4,B4,94]. Constrain the secondary bus number set to the appropriate bits of the registers. Change-Id: If70825449f298aa66f7f8b76dbd7367455a6deb1 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12068 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -184,17 +184,14 @@ static void ht_route_link(struct bus *link, scan_state mode)
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* not correctly configured
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*/
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busses = pci_read_config32(link->dev, link->cap + 0x14);
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busses &= 0xff000000;
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busses &= ~(0xff << 8);
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busses |= parent->secondary & 0xff;
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if (mode == HT_ROUTE_CLOSE) {
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busses |= 0xfeff << 8;
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} else if (mode == HT_ROUTE_SCAN) {
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if (mode == HT_ROUTE_CLOSE)
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busses |= 0xff << 8;
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else if (mode == HT_ROUTE_SCAN)
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busses |= ((u32) link->secondary & 0xff) << 8;
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busses |= 0xfc << 16;
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} else if (mode == HT_ROUTE_FINAL) {
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else if (mode == HT_ROUTE_FINAL)
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busses |= ((u32) link->secondary & 0xff) << 8;
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busses |= ((u32) link->subordinate & 0xff) << 16;
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}
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pci_write_config32(link->dev, link->cap + 0x14, busses);
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if (mode == HT_ROUTE_FINAL) {
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