tegra132: Set dc to resize the difference between framebuffer and panel
Scale framebuffer resolution to panel resolution. BRANCH=none BUG=chrome-os-partner:31936 TEST=build and test on ryu Change-Id: Idb19f5871605e878ea380cc8f701a377350681fb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d2f08a704fe3a7be1e0448e4ed864c69b50d6838 Original-Change-Id: I5ac01539da3712cd6afdb8d08513da399ace0f92 Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/229494 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9522 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -488,6 +488,8 @@ enum {
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};
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/* DC_WIN_DDA_INCREMENT 0x709 */
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#define DDA_INC(prescaled_size, post_scaled_size) \
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(((prescaled_size) - 1) * 0x1000 / ((post_scaled_size) - 1))
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#define H_DDA_INC(x) (((x) & 0xffff) << 0)
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#define V_DDA_INC(x) (((x) & 0xffff) << 16)
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@ -82,7 +82,7 @@ static void print_mode(const struct soc_nvidia_tegra132_config *config)
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if (config) {
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int refresh = tegra_calc_refresh(config);
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printk(BIOS_ERR,
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"MODE:%dx%d@%d.%03uHz pclk=%d\n",
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"Panel Mode: %dx%d@%d.%03uHz pclk=%d\n",
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config->xres, config->yres,
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refresh / 1000, refresh % 1000,
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config->pixel_clock);
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@ -164,17 +164,21 @@ static void update_window(const struct soc_nvidia_tegra132_config *config)
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WRITEL(WINDOW_A_SELECT, &disp_ctrl->cmd.disp_win_header);
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WRITEL(((config->yres << 16) | config->xres), &disp_ctrl->win.size);
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WRITEL(((config->yres << 16) |
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(config->xres * config->framebuffer_bits_per_pixel / 8)),
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WRITEL(((config->display_yres << 16) |
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(config->display_xres *
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config->framebuffer_bits_per_pixel / 8)),
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&disp_ctrl->win.prescaled_size);
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val = ALIGN_UP((config->xres * config->framebuffer_bits_per_pixel / 8),
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64);
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val = ALIGN_UP((config->display_xres *
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config->framebuffer_bits_per_pixel / 8), 64);
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WRITEL(val, &disp_ctrl->win.line_stride);
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WRITEL(config->color_depth, &disp_ctrl->win.color_depth);
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WRITEL(COLOR_BLACK, &disp_ctrl->disp.blend_background_color);
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WRITEL((V_DDA_INC(0x1000) | H_DDA_INC(0x1000)),
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WRITEL(((DDA_INC(config->display_yres, config->yres) << 16) |
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DDA_INC(config->display_xres, config->xres)),
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&disp_ctrl->win.dda_increment);
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WRITEL(DISP_CTRL_MODE_C_DISPLAY, &disp_ctrl->cmd.disp_cmd);
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@ -247,7 +251,8 @@ void display_startup(device_t dev)
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}
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if (framebuffer_size_mb == 0){
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framebuffer_size_mb = ALIGN_UP(config->xres * config->yres *
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framebuffer_size_mb = ALIGN_UP(config->display_xres *
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config->display_yres *
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(config->framebuffer_bits_per_pixel / 8), MiB)/MiB;
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}
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@ -299,11 +304,11 @@ void display_startup(device_t dev)
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*/
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struct edid edid;
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/* Align bytes_per_line to 64 bytes as required by dc */
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edid.bytes_per_line = ALIGN_UP((config->xres *
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edid.bytes_per_line = ALIGN_UP((config->display_xres *
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config->framebuffer_bits_per_pixel / 8), 64);
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edid.x_resolution = edid.bytes_per_line /
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(config->framebuffer_bits_per_pixel / 8);
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edid.y_resolution = config->yres;
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edid.y_resolution = config->display_yres;
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edid.framebuffer_bits_per_pixel = config->framebuffer_bits_per_pixel;
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printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "
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