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F15tn / Hudson: Change SATA NumOfPorts register setting 

The Number of Ports register says that it should be set to the maximum
number of ports supported by the silicon.  AGESA was setting this to be
the number of enabled ports.  If port 1 was the only port with a drive,
this value got set to 0, indicating 1 port.  This causes SeaBIOS to only
look at port 0 and quit, never finding the drive on port 1.

Dave Frodin: I also verified that this patch allows a SATA drive plugged
into port 2 to be detected without a device in port 1.

Change-Id: I5d49e351864449520e3957bbb07edf0f3ec2fd47
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2165
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Martin Roth 2013-01-16 17:50:32 -07:00
parent c89d3daf32
commit 931df3a96b
1 changed files with 7 additions and 18 deletions
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25
src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c
View File

@ -83,7 +83,6 @@
* D E F I N I T I O N S A N D M A C R O S * D E F I N I T I O N S A N D M A C R O S
*---------------------------------------------------------------------------------------- *----------------------------------------------------------------------------------------
*/ */
UINT8 NumOfSataPorts = 8;
/** /**
* FchSataGpioInitial - Sata GPIO function Procedure * FchSataGpioInitial - Sata GPIO function Procedure
@ -581,7 +580,6 @@ FchShutdownUnconnectedSataPortClock (
{ {
UINT8 PortNumByte; UINT8 PortNumByte;
UINT8 PortSataStatusByte; UINT8 PortSataStatusByte;
UINT8 NumOfPorts;
UINT8 FchSataClkAutoOff; UINT8 FchSataClkAutoOff;
FCH_DATA_BLOCK *LocalCfgPtr; FCH_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader; AMD_CONFIG_PARAMS *StdHeader;
@ -590,7 +588,6 @@ FchShutdownUnconnectedSataPortClock (
StdHeader = LocalCfgPtr->StdHeader; StdHeader = LocalCfgPtr->StdHeader;
FchSataClkAutoOff = (UINT8) LocalCfgPtr->Sata.SataClkAutoOff; FchSataClkAutoOff = (UINT8) LocalCfgPtr->Sata.SataClkAutoOff;
NumOfPorts = 0;
// //
// Enable SATA auto clock control by default // Enable SATA auto clock control by default
// //
@ -606,28 +603,20 @@ FchShutdownUnconnectedSataPortClock (
} }
} ///end of for (PortNumByte=0;PortNumByte<6;PortNumByte++) } ///end of for (PortNumByte=0;PortNumByte<6;PortNumByte++)
ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte);
// //
//Set the Ports Implemented register
//if all ports are in disabled state, report at least one port //if all ports are in disabled state, report at least one port
// //
ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte);
if ( (PortSataStatusByte & 0xFF) == 0) { if ( (PortSataStatusByte & 0xFF) == 0) {
RwMem (Bar5 + 0x0C, AccessWidth8, (UINT32) ~(0xFF), 01); RwMem (Bar5 + 0x0C, AccessWidth8, (UINT32) ~(0xFF), 01);
} }
ReadMem (Bar5 + 0x0C, AccessWidth8, &PortSataStatusByte); //
// Number of Ports (NP): 0’s based value indicating the maximum number
for (PortNumByte = 0; PortNumByte < MAX_SATA_PORTS; PortNumByte ++) { // of ports supported by the HBA silicon.
if (PortSataStatusByte & (1 << PortNumByte)) { //
NumOfPorts++; RwMem (Bar5 + 0x00, AccessWidth8, 0xE0, MAX_SATA_PORTS - 1);
}
}
if ( NumOfPorts == 0) {
NumOfPorts = 0x01;
}
RwMem (Bar5 + 0x00, AccessWidth8, 0xE0, NumOfPorts - 1);
} }
/** /**