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mb/amd/persimmon: Switch away from ROMCC_BOOTBLOCK 

Warning: Not tested on hardware.

Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I51d42f137fa539225bca5631bec38144ffd4f1d5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38873
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mike Banon 2020-02-13 16:13:18 +00:00 committed by Patrick Georgi
parent d6cb3bc942
commit 938ae2655f
4 changed files with 6 additions and 10 deletions
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4
src/mainboard/amd/persimmon/Kconfig
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@ -13,14 +13,10 @@
# GNU General Public License for more details. # GNU General Public License for more details.
# #
config BOARD_AMD_PERSIMMON
def_bool n
if BOARD_AMD_PERSIMMON if BOARD_AMD_PERSIMMON
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
#select ROMCC_BOOTBLOCK
select CPU_AMD_AGESA_FAMILY14 select CPU_AMD_AGESA_FAMILY14
select NORTHBRIDGE_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14
select SOUTHBRIDGE_AMD_CIMX_SB800 select SOUTHBRIDGE_AMD_CIMX_SB800

4
src/mainboard/amd/persimmon/Kconfig.name
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@ -1,2 +1,2 @@
#config BOARD_AMD_PERSIMMON config BOARD_AMD_PERSIMMON
# bool"Persimmon" bool "Persimmon"

2
src/mainboard/amd/persimmon/Makefile.inc
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@ -20,6 +20,8 @@ pci$(stripped_ahcibios_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_BIOS_FI
pci$(stripped_ahcibios_id).rom-type := optionrom pci$(stripped_ahcibios_id).rom-type := optionrom
endif endif
bootblock-y += bootblock.c
romstage-y += buildOpts.c romstage-y += buildOpts.c
romstage-y += BiosCallOuts.c romstage-y += BiosCallOuts.c
romstage-y += OemCustomize.c romstage-y += OemCustomize.c

6
src/mainboard/amd/persimmon/romstage.c → src/mainboard/amd/persimmon/bootblock.c
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@ -13,15 +13,13 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <northbridge/amd/agesa/state_machine.h> #include <bootblock_common.h>
#include <superio/fintek/common/fintek.h> #include <superio/fintek/common/fintek.h>
#include <superio/fintek/f81865f/f81865f.h> #include <superio/fintek/f81865f/f81865f.h>
#include <sb_cimx.h>
#define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1) #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
void board_BeforeAgesa(struct sysinfo *cb) void bootblock_mainboard_early_init(void)
{ {
sb_Poweron_Init();
fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
} }