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usbdebug: Do not support logging from SMM 

Letting SMI handler touch EHCI controller is an excellent source
of USB problems. Remove usbdebug entirely from SMM.

It may be possible to make usbdebug console work from SMM
after hard work and coordination with payloads and even
OS drivers. But we are not there.

Change-Id: Id50586758ee06e8d76e682dc6f64f756ab5b79f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3858
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
This commit is contained in:
Kyösti Mälkki 2013-08-13 21:51:53 +03:00
parent 6bfe61d5d1
commit 93b2bd70ff
9 changed files with 0 additions and 14 deletions
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6
src/cpu/x86/smm/smiutil.c
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@ -31,9 +31,6 @@ static u32 serial8250mem_base_address = 0;
void console_tx_flush(void) void console_tx_flush(void)
{ {
#if CONFIG_USBDEBUG
usbdebug_tx_flush(0);
#endif
} }
void console_tx_byte(unsigned char byte) void console_tx_byte(unsigned char byte)
@ -48,9 +45,6 @@ void console_tx_byte(unsigned char byte)
#if CONFIG_CONSOLE_SERIAL8250 #if CONFIG_CONSOLE_SERIAL8250
uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); uart8250_tx_byte(CONFIG_TTYS0_BASE, byte);
#endif #endif
#if CONFIG_USBDEBUG
usbdebug_tx_byte(0, byte);
#endif
#if CONFIG_CONSOLE_NE2K #if CONFIG_CONSOLE_NE2K
ne2k_append_data(&byte, 1, CONFIG_CONSOLE_NE2K_IO_PORT); ne2k_append_data(&byte, 1, CONFIG_CONSOLE_NE2K_IO_PORT);
#endif #endif

1
src/lib/Makefile.inc
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@ -128,7 +128,6 @@ endif
smm-y += cbfs.c memcmp.c smm-y += cbfs.c memcmp.c
smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
smm-$(CONFIG_USBDEBUG) += usbdebug.c
smm-y += gcc.c smm-y += gcc.c
$(obj)/lib/version.ramstage.o : $(obj)/build.h $(obj)/lib/version.ramstage.o : $(obj)/build.h

1
src/southbridge/amd/sb600/Makefile.inc
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@ -10,4 +10,3 @@ ramstage-y += pci.c
ramstage-y += reset.c ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c

1
src/southbridge/amd/sb700/Makefile.inc
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@ -12,7 +12,6 @@ romstage-y += reset.c
ramstage-y += reset.c ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c romstage-y += early_setup.c
romstage-y += smbus.c romstage-y += smbus.c

1
src/southbridge/amd/sb800/Makefile.inc
View File

@ -11,4 +11,3 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c

1
src/southbridge/intel/common/Makefile.inc
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@ -19,4 +19,3 @@
romstage-$(CONFIG_USBDEBUG) += usb_debug.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
smm-$(CONFIG_USBDEBUG) += usb_debug.c

1
src/southbridge/nvidia/ck804/Makefile.inc
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@ -17,7 +17,6 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c romstage-y += early_smbus.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc

1
src/southbridge/nvidia/mcp55/Makefile.inc
View File

@ -17,7 +17,6 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc
chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds

1
src/southbridge/sis/sis966/Makefile.inc
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@ -12,7 +12,6 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc
chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds