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arch/riscv: Store mprv bit in size_t 

CSRs are XLEN bits wide (i.e. the same width as general purpose
registers), so size_t seems a little more correct than int.

This change doesn't affect functionality because MSTATUS_MPRV already
fits in 31 bits.

Change-Id: I003c1b88b4493681dc9b6178ac785be330203ef5
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Jonathan Neuschäfer 2018-04-08 15:05:08 +02:00 committed by Patrick Georgi
parent 225b03534c
commit 93c9130a67
1 changed files with 2 additions and 2 deletions
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4
src/arch/riscv/include/vm.h
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@ -42,7 +42,7 @@ void mstatus_init(void); // need to setup mstatus so we know we have virtual mem
static inline type name(type *p); \ static inline type name(type *p); \
static inline type name(type *p) \ static inline type name(type *p) \
{ \ { \
int mprv = MSTATUS_MPRV; \ size_t mprv = MSTATUS_MPRV; \
type value; \ type value; \
asm ( \ asm ( \
"csrs mstatus, %1\n" \ "csrs mstatus, %1\n" \
@ -57,7 +57,7 @@ void mstatus_init(void); // need to setup mstatus so we know we have virtual mem
static inline void name(type *p, type value); \ static inline void name(type *p, type value); \
static inline void name(type *p, type value) \ static inline void name(type *p, type value) \
{ \ { \
int mprv = MSTATUS_MPRV; \ size_t mprv = MSTATUS_MPRV; \
asm ( \ asm ( \
"csrs mstatus, %0\n" \ "csrs mstatus, %0\n" \
STRINGIFY(insn) " %1, 0(%2)\n" \ STRINGIFY(insn) " %1, 0(%2)\n" \