soc/intel/cannonlake: add soc implementation for ETR address API
Add soc implementation for the new ETR address API. Change-Id: Ifc128099185a2c40ec3e7c5f84fcc42227c93f28 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36567 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -172,6 +172,11 @@ uintptr_t soc_read_pmc_base(void)
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return (uintptr_t)pmc_mmio_regs();
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}
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uint32_t *soc_pmc_etr_addr(void)
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{
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return (uint32_t *)(soc_read_pmc_base() + ETR);
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}
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void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
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{
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DEVTREE_CONST struct soc_intel_cannonlake_config *config;
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