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soc/intel/cannonlake: add soc implementation for ETR address API 

Add soc implementation for the new ETR address API.

Change-Id: Ifc128099185a2c40ec3e7c5f84fcc42227c93f28
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36567
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2019-11-02 12:14:06 +01:00 committed by Patrick Georgi
parent b4d960b65a
commit 93d215cb05
1 changed files with 5 additions and 0 deletions
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5
src/soc/intel/cannonlake/pmutil.c
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@ -172,6 +172,11 @@ uintptr_t soc_read_pmc_base(void)
return (uintptr_t)pmc_mmio_regs(); return (uintptr_t)pmc_mmio_regs();
} }
uint32_t *soc_pmc_etr_addr(void)
{
return (uint32_t *)(soc_read_pmc_base() + ETR);
}
void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{ {
DEVTREE_CONST struct soc_intel_cannonlake_config *config; DEVTREE_CONST struct soc_intel_cannonlake_config *config;