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mb/google/brya/var/crota: set tcc_offset value to 1 ℃ 

Set tcc_offset value to 1℃  in devicetree for Thermal Control Circuit
(TCC) activation feature. This value is suggested by Thermal team.

BUG=b:246913963
TEST=USE="project_crota project_brya" emerge-brya coreboot

Signed-off-by: Johnny Li <johnny_li@wistron.corp-partner.google.com>
Change-Id: Ie2f60bed34fbd6fa3624be60138511a22b199a8d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Johnny Li 2022-09-19 17:31:24 +08:00 committed by Tim Wawrzynczak
parent 88a496a9c8
commit 93e8f80434
1 changed files with 1 additions and 0 deletions
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1
src/mainboard/google/brya/variants/crota/overridetree.cb
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@ -79,6 +79,7 @@ chip soc/intel/alderlake
register "usb3_ports[0]" = "USB3_PORT_EMPTY" register "usb3_ports[0]" = "USB3_PORT_EMPTY"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
register "tcss_ports[1]" = "TCSS_PORT_EMPTY" register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
register "tcc_offset" = "1" # TCC of 99C
device domain 0 on device domain 0 on
device ref dtt on device ref dtt on