stout: Add native gfx init
Tested during FOSDEM. Change-Id: Id095364d6e4735256e54a68ea9ae677355dd386a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13532 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
parent
b2eea81992
commit
93fc60621c
|
@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
|
|||
select MAINBOARD_HAS_CHROMEOS
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select INTEL_INT15
|
||||
select IVYBRIDGE_LVDS
|
||||
|
||||
config CHROMEOS
|
||||
select CHROMEOS_VBNV_CMOS
|
||||
|
|
|
@ -14,6 +14,12 @@ chip northbridge/intel/sandybridge
|
|||
register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms
|
||||
register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
|
||||
|
||||
# For native gfx
|
||||
register "gfx.use_spread_spectrum_clock" = "0"
|
||||
register "gfx.link_frequency_270_mhz" = "1"
|
||||
register "gpu_cpu_backlight" = "0x1155"
|
||||
register "gpu_pch_backlight" = "0x06100610"
|
||||
|
||||
device cpu_cluster 0 on
|
||||
chip cpu/intel/socket_rPGA989
|
||||
device lapic 0 on end
|
||||
|
|
Loading…
Reference in New Issue