soc/intel/cannonlake: Add support for EMMC DLL update

Add option to have customized DLL setting for EMMC interface to make
EMMC able to run at HS400 speed.

BUG=None

Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/23600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lijian Zhao 2018-02-05 18:14:11 -08:00 committed by Martin Roth
parent 6b78b73d79
commit 93fde11aef
2 changed files with 12 additions and 1 deletions

View File

@ -262,6 +262,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* eMMC and SD */
params->ScsEmmcEnabled = config->ScsEmmcEnabled;
params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed;
if (config->EmmcHs400DllNeed == 1) {
params->PchScsEmmcHs400RxStrobeDll1 =
config->EmmcHs400RxStrobeDll1;
params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll;
}
params->ScsSdCardEnabled = config->ScsSdCardEnabled;
params->ScsUfsEnabled = config->ScsUfsEnabled;

View File

@ -155,7 +155,12 @@ struct soc_intel_cannonlake_config {
/* eMMC and SD */
uint8_t ScsEmmcEnabled;
uint8_t ScsEmmcHs400Enabled;
uint8_t PchScsEmmcHs400TuningRequired;
/* Need to update DLL setting to get Emmc running at HS400 speed */
uint8_t EmmcHs400DllNeed;
/* 0-39: number of active delay for RX strobe, unit is 125 psec */
uint8_t EmmcHs400RxStrobeDll1;
/* 0-78: number of active delay for TX data, unit is 125 psec */
uint8_t EmmcHs400TxDataDll;
uint8_t ScsSdCardEnabled;
uint8_t ScsUfsEnabled;