mb/apple/macbookair4_2: Correctly implement SPD mapping the Haswell way

While converting this board to provide SPD info using the Haswell API,
it was discovered that its SPD setup was not correct to begin with.
For a board that only has soldered down memory with SPD data in CBFS,
it didn't enable HAVE_SPD_IN_CBFS in Kconfig. It also duplicated one
set of SPD data with deliberate gaps in between. It worked its dark
magic within mainboard_get_spd(), which is going away as a callback.

Add HAVE_SPD_IN_CBFS to mainboard Kconfig, recreate the one set of SPD
data as a hex dump same as other boards, and hook everything back up
with Haswell-style mb_get_spd_map().

Recreated SPD data was extracted from abuild-built binary and manually
verified for correctness against existing spd.bin (which will be
removed in a follow-up).

Change-Id: I906c49f6d1949f830828530edc0298b1b22ec04d
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76995
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2023-08-22 17:36:56 -04:00 committed by Felix Held
parent 1e9601c5ef
commit 940fe080bf
4 changed files with 39 additions and 15 deletions

View File

@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_LIBGFXINIT
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
select HAVE_SPD_IN_CBFS
config MAINBOARD_DIR
default "apple/macbookair4_2"

View File

@ -4,9 +4,7 @@ bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-y += gnvs.c
cbfs-files-y += spd.bin
spd.bin-file := spd.bin
spd.bin-type := spd
SPD_SOURCES = apple
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
bootblock-y += early_init.c

View File

@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <string.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <cbfs.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 }, /* USB HUB 1 */
@ -22,14 +20,9 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 0, -1 }, /* Unused */
};
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
void mb_get_spd_map(struct spd_info *spdi)
{
void *spd_file;
size_t spd_file_len = 0;
spd_file = cbfs_map("spd.bin", &spd_file_len);
if (spd_file && spd_file_len >= 1024) {
int i;
for (i = 0; i < 4; i++)
memcpy(&spd[i], spd_file + 256 * i, 128);
}
spdi->addresses[0] = SPD_MEMORY_DOWN;
spdi->addresses[2] = SPD_MEMORY_DOWN;
spdi->spd_index = 0;
}

View File

@ -0,0 +1,32 @@
92 11 0b 03 03 00 00 01
03 52 01 08 0c 00 20 00
6c 78 6c 30 6c 11 20 81
04 05 3c 3c 00 f0 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 65 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 b0 59
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00