soc/amd/picasso/uart: factor out console-related functions

Move uart_platform_base and uart_platform_refclk to their own
compilation unit to avoid preprocessor usage. The newly created
compilation unit is only added to the build when PICASSO_CONSOLE_UART
is selected.

Change-Id: I56911addc8c000a0772156e5166720867cdd26fe
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42517
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2020-06-18 15:54:43 +02:00 committed by Felix Held
parent 02f7471b19
commit 9412b3e9bb
6 changed files with 43 additions and 22 deletions

View File

@ -16,6 +16,7 @@ bootblock-y += aoac.c
bootblock-y += southbridge.c bootblock-y += southbridge.c
bootblock-y += i2c.c bootblock-y += i2c.c
bootblock-y += uart.c bootblock-y += uart.c
bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
bootblock-y += tsc_freq.c bootblock-y += tsc_freq.c
bootblock-y += gpio.c bootblock-y += gpio.c
bootblock-y += smi_util.c bootblock-y += smi_util.c
@ -27,6 +28,7 @@ romstage-y += gpio.c
romstage-y += pmutil.c romstage-y += pmutil.c
romstage-y += memmap.c romstage-y += memmap.c
romstage-y += uart.c romstage-y += uart.c
romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
romstage-y += tsc_freq.c romstage-y += tsc_freq.c
romstage-y += aoac.c romstage-y += aoac.c
romstage-y += southbridge.c romstage-y += southbridge.c
@ -41,6 +43,7 @@ verstage-y += pmutil.c
verstage-y += config.c verstage-y += config.c
verstage-y += aoac.c verstage-y += aoac.c
verstage-y += uart.c verstage-y += uart.c
verstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
verstage-y += tsc_freq.c verstage-y += tsc_freq.c
ramstage-y += i2c.c ramstage-y += i2c.c
@ -61,6 +64,7 @@ ramstage-y += memmap.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
ramstage-y += uart.c ramstage-y += uart.c
ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
ramstage-y += usb.c ramstage-y += usb.c
ramstage-y += tsc_freq.c ramstage-y += tsc_freq.c
ramstage-y += finalize.c ramstage-y += finalize.c
@ -76,7 +80,10 @@ all-y += reset.c
smm-y += smihandler.c smm-y += smihandler.c
smm-y += smi_util.c smm-y += smi_util.c
smm-y += tsc_freq.c smm-y += tsc_freq.c
smm-$(CONFIG_DEBUG_SMI) += uart.c ifeq ($(CONFIG_DEBUG_SMI),y)
smm-y += uart.c
smm-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
endif
smm-y += gpio.c smm-y += gpio.c
smm-y += psp.c smm-y += psp.c
smm-y += smu.c smm-y += smu.c

View File

@ -287,8 +287,6 @@ void southbridge_final(void *chip_info);
void southbridge_init(void *chip_info); void southbridge_init(void *chip_info);
void fch_pre_init(void); void fch_pre_init(void);
void fch_early_init(void); void fch_early_init(void);
void set_uart_config(int idx);
void clear_uart_legacy_config(void);
/* Initialize all the i2c buses that are marked with early init. */ /* Initialize all the i2c buses that are marked with early init. */
void i2c_soc_early_init(void); void i2c_soc_early_init(void);

View File

@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __PICASSO_UART_H__
#define __PICASSO_UART_H__
#include <types.h>
void set_uart_config(int idx); /* configure hardware of FCH UART selected by idx */
void clear_uart_legacy_config(void); /* disable legacy I/O decode for FCH UART */
uintptr_t get_uart_base(int idx); /* get MMIO base address of FCH UART */
#endif /* __PICASSO_UART_H__ */

View File

@ -21,6 +21,7 @@
#include <soc/i2c.h> #include <soc/i2c.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
#include <soc/smi.h> #include <soc/smi.h>
#include <soc/uart.h>
#include <soc/amd_pci_int_defs.h> #include <soc/amd_pci_int_defs.h>
#include <delay.h> #include <delay.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>

View File

@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h> #include <acpi/acpigen.h>
#include <console/uart.h>
#include <console/console.h> #include <console/console.h>
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <device/mmio.h> #include <device/mmio.h>
@ -9,6 +8,7 @@
#include <amdblocks/acpimmio.h> #include <amdblocks/acpimmio.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
#include <soc/gpio.h> #include <soc/gpio.h>
#include <soc/uart.h>
static const struct _uart_info { static const struct _uart_info {
uintptr_t base; uintptr_t base;
@ -32,17 +32,7 @@ static const struct _uart_info {
} }, } },
}; };
/* uintptr_t get_uart_base(int idx)
* Don't provide uart_platform_base and uart_platform_refclk functions if PICASSO_CONSOLE_UART
* isn't selected. Those two functions are used by the console UART driver and need to be
* provided exactly once and only by the UART that is used for console.
*
* TODO: Replace the #if block by factoring out the two functions into a different compilation
* unit.
*/
#if CONFIG(PICASSO_CONSOLE_UART)
uintptr_t uart_platform_base(int idx)
{ {
if (idx < 0 || idx >= ARRAY_SIZE(uart_info)) if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
return 0; return 0;
@ -50,13 +40,6 @@ uintptr_t uart_platform_base(int idx)
return uart_info[idx].base; return uart_info[idx].base;
} }
unsigned int uart_platform_refclk(void)
{
return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
}
#endif /* PICASSO_CONSOLE_UART */
void clear_uart_legacy_config(void) void clear_uart_legacy_config(void)
{ {
write16((void *)FCH_UART_LEGACY_DECODE, 0); write16((void *)FCH_UART_LEGACY_DECODE, 0);

View File

@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/uart.h>
#include <soc/uart.h>
/*
* uart_platform_base and uart_platform_refclk are used by the console UART driver and need to
* be provided exactly once and only by the UART that is used for console.
*/
uintptr_t uart_platform_base(int idx)
{
return get_uart_base(idx);
}
unsigned int uart_platform_refclk(void)
{
return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
}