soc/intel/icelake: Make CpuMpPpi implementation default for ICL

TEST=Could able to build and boot ICL DE system

Change-Id: Icd71ec99f06434896c73cff5a52cd3a5ad6ce5f3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Subrata Banik 2019-11-14 11:30:43 +05:30 committed by Patrick Georgi
parent 53509cf15a
commit 94146009a1
2 changed files with 5 additions and 6 deletions

View File

@ -60,6 +60,7 @@ config CPU_SPECIFIC_OPTIONS
select UDK_2017_BINDING select UDK_2017_BINDING
select DISPLAY_FSP_VERSION_INFO select DISPLAY_FSP_VERSION_INFO
select HECI_DISABLE_USING_SMM select HECI_DISABLE_USING_SMM
select USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
default 0xfef00000 default 0xfef00000

View File

@ -84,12 +84,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++) for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++)
params->Usb3OverCurrentPin[i] = 0; params->Usb3OverCurrentPin[i] = 0;
if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { /* Mandatory to make use of CpuMpPpi implementation from ICL onwards */
params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data();
params->SkipMpInit = 0; /* TODO: Remove me as SkipMpInit is getting deprecated */
} else { params->SkipMpInit = 0;
params->SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT;
}
mainboard_silicon_init_params(params); mainboard_silicon_init_params(params);