helpers: Add GENMASK macro
The GENMASK is defined in multiple files (with various names such as MASKBIT), which sets certain consecutive bits to 1 and leaves the others to 0. To avoid duplicate macros, add GENMASK macro to helpers.h. GENMASK(high, low) sets bits from `high` to `low` (inclusive) to 1. For example, GENMASK(39, 21) gives us the 64-bit vector 0x000000ffffe00000. Remove duplicate macro definitions. Also utilize GENMASK for _BF_MASK in mmio.h. BUG=none TEST=make tests/commonlib/bsd/helpers-test TEST=emerge-cherry coreboot BRANCH=none Change-Id: If2e7c4827d8a7d27688534593b556a72f16f0c2b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -54,6 +54,9 @@
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#define POWER_OF_2(x) (1ULL << (x))
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/* Set bits from `high` to `low` (inclusive). */
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#define GENMASK(high, low) (((~0ULL) << (low)) & (~0ULL >> (63 - (high))))
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#define DIV_ROUND_UP(x, y) ({ \
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__typeof__(x) _div_local_x = (x); \
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__typeof__(y) _div_local_y = (y); \
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@ -4,6 +4,7 @@
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#define __DEVICE_MMIO_H__
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#include <arch/mmio.h>
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#include <commonlib/helpers.h>
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#include <endian.h>
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#include <types.h>
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@ -130,7 +131,8 @@ static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo,
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#define DEFINE_BIT(name, bit) DEFINE_BITFIELD(name, bit, bit)
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#define _BF_MASK(name, value) \
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((u32)((1ULL << name##_BITFIELD_SIZE) - 1) << name##_BITFIELD_SHIFT)
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((u32)GENMASK(name##_BITFIELD_SHIFT + name##_BITFIELD_SIZE - 1, \
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name##_BITFIELD_SHIFT))
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#define _BF_VALUE(name, value) \
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(((u32)(value) << name##_BITFIELD_SHIFT) & _BF_MASK(name, 0))
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@ -5,8 +5,6 @@
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#include <soc/pll.h>
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#include <types.h>
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#define GENMASK(h, l) (BIT(h + 1) - BIT(l))
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void mux_set_sel(const struct mux *mux, u32 sel)
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{
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u32 mask = GENMASK(mux->mux_width - 1, 0);
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@ -9,6 +9,7 @@
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#include <soc/dptx_reg.h>
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#include <string.h>
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#include <timer.h>
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#include <types.h>
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#define REG_OFFSET_LIMIT 0x8000
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@ -173,21 +174,21 @@ void dptx_hal_set_color_format(struct mtk_dp *mtk_dp, u8 out_format)
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{
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/* MISC0 */
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mtk_dp_write_byte(mtk_dp, REG_3034_DP_ENCODER0_P0,
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out_format << 0x1, MASKBIT(2, 1));
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out_format << 0x1, GENMASK(2, 1));
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switch (out_format) {
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case DP_COLOR_FORMAT_RGB_444:
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case DP_COLOR_FORMAT_YUV_444:
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mtk_dp_write_byte(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1,
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0, MASKBIT(6, 4));
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0, GENMASK(6, 4));
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break;
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case DP_COLOR_FORMAT_YUV_422:
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mtk_dp_write_byte(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1,
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BIT(4), MASKBIT(6, 4));
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BIT(4), GENMASK(6, 4));
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break;
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case DP_COLOR_FORMAT_YUV_420:
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mtk_dp_write_byte(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1, BIT(5),
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MASKBIT(6, 4));
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GENMASK(6, 4));
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break;
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default:
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break;
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@ -592,15 +593,15 @@ void dptx_hal_hpd_int_en(struct mtk_dp *mtk_dp, bool enable)
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{
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/* [7]:int, [6]:Con, [5]DisCon, [4]No-Use: UnMASK HPD Port */
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mtk_dp_write_byte(mtk_dp, REG_3418_DP_TRANS_P0,
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enable ? 0 : MASKBIT(7, 5), MASKBIT(7, 5));
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enable ? 0 : GENMASK(7, 5), GENMASK(7, 5));
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}
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void dptx_hal_hpd_detect_setting(struct mtk_dp *mtk_dp)
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{
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mtk_dp_write_byte(mtk_dp, REG_3410_DP_TRANS_P0,
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0x8, MASKBIT(3, 0));
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0x8, GENMASK(3, 0));
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mtk_dp_write_byte(mtk_dp, REG_3410_DP_TRANS_P0,
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0xa << 4, MASKBIT(7, 4));
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0xa << 4, GENMASK(7, 4));
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DP_WRITE1BYTE(mtk_dp, REG_3410_DP_TRANS_P0 + 1, 0x55);
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DP_WRITE1BYTE(mtk_dp, REG_3430_DP_TRANS_P0, 0x2);
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@ -643,14 +644,14 @@ void dptx_hal_phy_setting(struct mtk_dp *mtk_dp)
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void dptx_hal_ssc_en(struct mtk_dp *mtk_dp, bool enable)
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{
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mtk_dp_mask(mtk_dp, 0x2000, BIT(0), MASKBIT(1, 0));
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mtk_dp_mask(mtk_dp, 0x2000, BIT(0), GENMASK(1, 0));
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if (enable)
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mtk_dp_mask(mtk_dp, 0x1014, BIT(3), BIT(3));
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else
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mtk_dp_mask(mtk_dp, 0x1014, 0x0, BIT(3));
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mtk_dp_mask(mtk_dp, 0x2000, MASKBIT(1, 0), MASKBIT(1, 0));
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mtk_dp_mask(mtk_dp, 0x2000, GENMASK(1, 0), GENMASK(1, 0));
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mdelay(1);
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}
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@ -666,7 +667,7 @@ void dptx_hal_aux_setting(struct mtk_dp *mtk_dp)
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DP_WRITE1BYTE(mtk_dp, REG_3634_AUX_TX_P0 + 1, 0x19);
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/* 0xd for 26M */
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mtk_dp_write_byte(mtk_dp, REG_3614_AUX_TX_P0,
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0xd, MASKBIT(6, 0));
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0xd, GENMASK(6, 0));
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mtk_dp_mask(mtk_dp, REG_37C8_AUX_TX_P0,
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0x01 << MTK_ATOP_EN_AUX_TX_P0_FLDMASK_POS,
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MTK_ATOP_EN_AUX_TX_P0_FLDMASK);
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@ -681,7 +682,7 @@ void dptx_hal_digital_setting(struct mtk_dp *mtk_dp)
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dptx_hal_set_color_depth(mtk_dp, DP_COLOR_DEPTH_8BIT);
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mtk_dp_write_byte(mtk_dp, REG_3368_DP_ENCODER1_P0 + 1,
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BIT(4), MASKBIT(5, 4));
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BIT(4), GENMASK(5, 4));
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/* DPtx encoder reset all sw. */
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mtk_dp_write_byte(mtk_dp, REG_3004_DP_ENCODER0_P0 + 1, BIT(1), BIT(1));
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@ -758,7 +759,7 @@ void dptx_hal_set_txtrainingpattern(struct mtk_dp *mtk_dp, int value)
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dptx_hal_phy_setidlepattern(mtk_dp, false);
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mtk_dp_write_byte(mtk_dp, REG_3400_DP_TRANS_P0 + 1,
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value, MASKBIT(7, 4));
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value, GENMASK(7, 4));
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}
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void dptx_hal_phy_setidlepattern(struct mtk_dp *mtk_dp, bool enable)
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@ -15,8 +15,6 @@
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#define DP_AUX_NATIVE_WRITE 0x8
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#define DP_AUX_NATIVE_READ 0x9
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#define MASKBIT(a, b) ((a > b) ? (BIT(a + 1) - BIT(b)) : (BIT(b + 1) - BIT(a)))
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#define DP_WRITE1BYTE(mtk_dp, reg, u8_val) \
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mtk_dp_write_byte(mtk_dp, reg, u8_val, 0xff)
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#define DP_WRITE2BYTE(mtk_dp, reg, u16_val) \
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@ -9,8 +9,6 @@
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#include <timer.h>
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#include <types.h>
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#define GENMASK(h, l) (BIT(h + 1) - BIT(l))
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/* GENI_OUTPUT_CTRL fields */
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#define DEFAULT_IO_OUTPUT_CTRL_MSK GENMASK(6, 0)
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@ -8,6 +8,19 @@ static void func(void)
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function_called();
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}
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static void test_genmask(void **state)
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{
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assert_int_equal(GENMASK(4, 4), 0x10);
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assert_int_equal(GENMASK(4, 3), 0x18);
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assert_int_equal(GENMASK(4, 0), 0x1f);
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/* Edge cases */
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assert_int_equal(GENMASK(0, 0), 1);
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assert_int_equal(GENMASK(31, 31), 0x80000000);
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assert_int_equal(GENMASK(31, 0), 0xffffffff);
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assert_int_equal(GENMASK(63, 63), 0x8000000000000000);
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assert_int_equal(GENMASK(63, 0), 0xffffffffffffffff);
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}
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static void test_retry(void **state)
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{
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int count;
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int main(void)
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{
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const struct CMUnitTest tests[] = {
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cmocka_unit_test(test_genmask),
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cmocka_unit_test(test_retry),
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};
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