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mb/hp/*/devicetree.cb: Move northbridge devices up 

It makes more sense for them to be above the southbridge block.

Change-Id: I7dc06a46123f4bfc23d91f9c8cc4c9bdc4fb64f5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-01-01 20:56:08 +01:00 committed by Nico Huber
parent 0e557aba4e
commit 942650f240
5 changed files with 22 additions and 15 deletions
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8
src/mainboard/hp/2570p/devicetree.cb
View File

@ -44,6 +44,11 @@ chip northbridge/intel/sandybridge
end
device domain 0x0 on
subsystemid 0x103c 0x17df inherit
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
@ -95,8 +100,5 @@ chip northbridge/intel/sandybridge
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
end
end

7
src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
View File

@ -41,6 +41,10 @@ chip northbridge/intel/sandybridge
device domain 0x0 on
subsystemid 0x103c 0x1495 inherit
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
@ -176,8 +180,5 @@ chip northbridge/intel/sandybridge
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
end
end

7
src/mainboard/hp/folio_9470m/devicetree.cb
View File

@ -45,6 +45,10 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
device domain 0x0 on
subsystemid 0x103c 0x18df inherit
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
@ -100,8 +104,5 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
end
end

7
src/mainboard/hp/revolve_810_g1/devicetree.cb
View File

@ -45,6 +45,10 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
device domain 0x0 on
subsystemid 0x103c 0x18f8 inherit
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
@ -100,8 +104,5 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
end
end

8
src/mainboard/hp/z220_sff_workstation/devicetree.cb
View File

@ -40,6 +40,11 @@ chip northbridge/intel/sandybridge
device domain 0x0 on
subsystemid 0x103c 0x1791 inherit
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
chip southbridge/intel/bd82x6x # Intel Series 7 PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
@ -176,8 +181,5 @@ chip northbridge/intel/sandybridge
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end
device pci 00.0 on end # Host bridge Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
end
end