util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs
The P2SB (PCI to Side-Band) bridge is on a different PCI device on APL. Hence, we have to decide based on the LPC ID which device to query. Also fix a comment. Change-Id: Ie20d7d2d246629d085bcf4740ba28b1e81e6a12a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/29896 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -247,6 +247,7 @@ static const struct {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C224, "C224"},
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C226, "C226"},
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H81, "H81"},
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_LPC, "Apollo Lake" },
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/* Intel GPUs */
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_G35_EXPRESS,
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"Intel(R) G35 Express Chipset Family" },
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@ -227,6 +227,8 @@ static inline uint32_t inl(unsigned port)
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#define PCI_DEVICE_ID_INTEL_BAYTRAIL_GFX 0x0f31
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#define CPUID_BAYTRAIL 0x30670
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#define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8
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/* Intel starts counting these generations with the integration of the DRAM controller */
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#define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN 0xd132 /* Nehalem */
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#define PCI_DEVICE_ID_INTEL_CORE_1ST_GEN 0x0044 /* Westmere */
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@ -70,11 +70,36 @@ void pcr_init(struct pci_dev *const sb)
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{
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bool error_exit = false;
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bool p2sb_revealed = false;
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struct pci_dev *p2sb;
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if (sbbar)
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return;
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struct pci_dev *const p2sb = pci_get_dev(sb->access, 0, 0, 0x1f, 1);
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switch (sb->device_id) {
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_PRE:
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case PCI_DEVICE_ID_INTEL_H110:
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case PCI_DEVICE_ID_INTEL_H170:
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case PCI_DEVICE_ID_INTEL_Z170:
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case PCI_DEVICE_ID_INTEL_Q170:
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case PCI_DEVICE_ID_INTEL_Q150:
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case PCI_DEVICE_ID_INTEL_B150:
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case PCI_DEVICE_ID_INTEL_C236:
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case PCI_DEVICE_ID_INTEL_C232:
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case PCI_DEVICE_ID_INTEL_QM170:
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case PCI_DEVICE_ID_INTEL_HM170:
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case PCI_DEVICE_ID_INTEL_CM236:
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case PCI_DEVICE_ID_INTEL_HM175:
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case PCI_DEVICE_ID_INTEL_QM175:
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case PCI_DEVICE_ID_INTEL_CM238:
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p2sb = pci_get_dev(sb->access, 0, 0, 0x1f, 1);
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break;
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case PCI_DEVICE_ID_INTEL_APL_LPC:
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p2sb = pci_get_dev(sb->access, 0, 0, 0x0d, 0);
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break;
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default:
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perror("Unknown LPC device.");
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exit(1);
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}
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if (!p2sb) {
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perror("Can't allocate device node for P2SB.");
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@ -86,8 +111,8 @@ void pcr_init(struct pci_dev *const sb)
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if (p2sb->vendor_id == 0xffff && p2sb->device_id == 0xffff) {
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printf("Trying to reveal Primary to Sideband Bridge "
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"(P2SB),\nlet's hope the OS doesn't mind... ");
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/* Do not use pci_write_long(). Surrounding
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bytes 0xe0 must be maintained. */
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/* Do not use pci_write_long(). Bytes
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surrounding 0xe0 must be maintained. */
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pci_write_byte(p2sb, 0xe0 + 1, 0);
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pci_fill_info(p2sb, PCI_FILL_IDENT | PCI_FILL_RESCAN);
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