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mb/google/kukui: Add discrete EMCP LPDDR4X table for Kakadu/Katsu 

Add EMCP LPDDR4X DDR MT29VZZZCD9GQKPR for ram id 8.

BUG=b:176262460
BRANCH=master
TEST=emerge-jacuzzi coreboot

Change-Id: If00478b9b05ab3ec48b6a8dec37e9f2f9f04e188
Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49447
Reviewed-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
xuxinxiong 2021-01-14 09:29:15 +08:00 committed by Patrick Georgi
parent 64fad6feb3
commit 9448682239
4 changed files with 42 additions and 1 deletions
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1
src/mainboard/google/kukui/Kconfig
View File

@ -76,6 +76,7 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
config BOARD_SDRAM_TABLE_OFFSET
hex
default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE || BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN
default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU
default 0x0
config BOARD_OVERRIDE_LCM_ID

14
src/mainboard/google/kukui/sdram_configs.c
View File

@ -24,13 +24,25 @@ static const char *const sdram_configs[] = {
[0x09] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
/* Table shared by Burnet and its variants, offset = 0x10 */
/* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */
[0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
[0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x13] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x14] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
[0x16] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
/* Table shared by Kakadu and its variants, offset = 0x20 */
[0x20] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
[0x21] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x22] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x23] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
[0x24] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
[0x25] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
[0x26] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
[0x27] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
[0x28] = "sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB",
};
static struct sdram_params params;

1
src/mainboard/google/kukui/sdram_params/Makefile.inc
View File

@ -12,6 +12,7 @@ sdram-params += sdram-lpddr4x-MT53E2G32D4NQ-046-8GB
sdram-params += sdram-lpddr4x-SDADA4CR-128G-4GB
sdram-params += sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB
sdram-params += sdram-lpddr4x-MT53E1G32D2NP-046-4GB
sdram-params += sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB
$(foreach params,$(sdram-params), \
$(eval cbfs-files-y += $(params)) \

27
src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB.c Normal file
View File

@ -0,0 +1,27 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/dramc_param.h>
struct sdram_params params = {
.source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG,
.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4,
.frequency = 1600,
.wr_level = {
[CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} },
[CHANNEL_B] = { {0x22, 0x1E}, {0x22, 0x1E} }
},
.cbt_cs_dly = {
[CHANNEL_A] = {0x5, 0x4},
[CHANNEL_B] = {0x8, 0x8}
},
.cbt_final_vref = {
[CHANNEL_A] = {0x56, 0x56},
[CHANNEL_B] = {0x56, 0x56}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,
.emi_conf_val = 0x00421000,
.chn_emi_cona_val = {0x0444F051, 0x0444F051},
.cbt_mode_extern = CBT_NORMAL_MODE,
.delay_cell_unit = 868,
};