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mb/intel/shadowmountain: Enable RTD3 for SD card 

Enable the PCIe RTD3 driver for the PCIe attached SD card interface
and specify the srcclk pin and reset GPIO.

TEST=Tested on shadowmountain platform to ensure the system can enter the
S0ix state and suspend/resume is stable

Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Change-Id: Ibeb99bea48d72b019cb2adcf38926c3ed39f7b84
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52134
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Rizwan Qureshi 2021-04-06 20:05:04 +05:30 committed by Felix Held
parent a66b816675
commit 9452aab4d3
1 changed files with 7 additions and 1 deletions
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8
src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
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@ -294,7 +294,13 @@ chip soc/intel/alderlake
device pci 1c.4 on end # RP5 device pci 1c.4 on end # RP5
device pci 1c.5 off end # RP6 device pci 1c.5 off end # RP6
device pci 1c.6 off end # RP7 device pci 1c.6 off end # RP7
device pci 1c.7 on end # RP8 device pci 1c.7 on
chip soc/intel/common/block/pcie/rtd3
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)"
register "srcclk_pin" = "3"
device generic 0 on end
end
end # RP8
device pci 1d.0 on end # RP9 device pci 1d.0 on end # RP9
device pci 1d.1 off end # RP10 device pci 1d.1 off end # RP10
device pci 1d.2 off end # RP11 device pci 1d.2 off end # RP11