util/amdfwtool: Add option for setting PSP/FW shared memory location
This tells the PSP where in main memory to copy the vboot workbuf. BUG=b:152576063 TEST=Build sharedmem destination into AMDFW, verify shared memory gets placed at that location. Signed-off-by: Martin Roth <martin@coreboot.org> Original-Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Change-Id: Ie1e955e22632ca5cf146ac6eec0407091e81f519 Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2148830 Original-Reviewed-by: Simon Glass <sjg@chromium.org> Change-Id: Id324403afa6d5a5a65ce4709be31e7f16e038da0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42044 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -213,6 +213,8 @@ static void usage(void)
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printf(" and must a multiple of 1024\n");
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printf(" and must a multiple of 1024\n");
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printf("-l | --location Location of Directory\n");
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printf("-l | --location Location of Directory\n");
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printf("-q | --anywhere Use any 64-byte aligned addr for Directory\n");
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printf("-q | --anywhere Use any 64-byte aligned addr for Directory\n");
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printf("-R | --sharedmem Location of PSP/FW shared memory\n");
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printf("-P | --sharedmem-size Maximum size of the PSP/FW shared memory area\n");
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printf("-h | --help show this help\n");
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printf("-h | --help show this help\n");
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}
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}
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@ -226,6 +228,7 @@ typedef enum _amd_bios_type {
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AMD_BIOS_UCODE = 0x66,
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AMD_BIOS_UCODE = 0x66,
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AMD_BIOS_APCB_BK = 0x68,
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AMD_BIOS_APCB_BK = 0x68,
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AMD_BIOS_MP2_CFG = 0x6a,
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AMD_BIOS_MP2_CFG = 0x6a,
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AMD_BIOS_PSP_SHARED_MEM = 0x6b,
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AMD_BIOS_L2_PTR = 0x70,
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AMD_BIOS_L2_PTR = 0x70,
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AMD_BIOS_INVALID,
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AMD_BIOS_INVALID,
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} amd_bios_type;
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} amd_bios_type;
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@ -396,6 +399,7 @@ static amd_bios_entry amd_bios_table[] = {
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{ .type = AMD_BIOS_UCODE, .inst = 1, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_UCODE, .inst = 1, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_UCODE, .inst = 2, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_UCODE, .inst = 2, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_MP2_CFG, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_MP2_CFG, .level = BDT_LVL2 },
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{ .type = AMD_BIOS_PSP_SHARED_MEM, .inst = 0, .level = BDT_BOTH },
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{ .type = AMD_BIOS_INVALID },
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{ .type = AMD_BIOS_INVALID },
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};
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};
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@ -481,7 +485,7 @@ typedef struct _bios_directory_table {
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bios_directory_entry entries[];
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bios_directory_entry entries[];
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} bios_directory_table;
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} bios_directory_table;
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#define MAX_BIOS_ENTRIES 0x2e
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#define MAX_BIOS_ENTRIES 0x2f
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typedef struct _context {
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typedef struct _context {
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char *rom; /* target buffer, size of flash device */
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char *rom; /* target buffer, size of flash device */
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@ -865,7 +869,8 @@ static void integrate_bios_firmwares(context *ctx,
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fw_table[i].type != AMD_BIOS_APOB &&
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fw_table[i].type != AMD_BIOS_APOB &&
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fw_table[i].type != AMD_BIOS_APOB_NV &&
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fw_table[i].type != AMD_BIOS_APOB_NV &&
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fw_table[i].type != AMD_BIOS_L2_PTR &&
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fw_table[i].type != AMD_BIOS_L2_PTR &&
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fw_table[i].type != AMD_BIOS_BIN))
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fw_table[i].type != AMD_BIOS_BIN &&
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fw_table[i].type != AMD_BIOS_PSP_SHARED_MEM))
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continue;
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continue;
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/* BIOS Directory items may have additional requirements */
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/* BIOS Directory items may have additional requirements */
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@ -915,6 +920,11 @@ static void integrate_bios_firmwares(context *ctx,
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}
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}
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}
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}
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/* PSP_SHARED_MEM needs a destination and size */
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if (fw_table[i].type == AMD_BIOS_PSP_SHARED_MEM &&
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(!fw_table[i].dest || !fw_table[i].size))
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continue;
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biosdir->entries[count].type = fw_table[i].type;
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biosdir->entries[count].type = fw_table[i].type;
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biosdir->entries[count].region_type = fw_table[i].region_type;
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biosdir->entries[count].region_type = fw_table[i].region_type;
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biosdir->entries[count].dest = fw_table[i].dest ?
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biosdir->entries[count].dest = fw_table[i].dest ?
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@ -974,6 +984,11 @@ static void integrate_bios_firmwares(context *ctx,
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ctx->current = ALIGN(ctx->current + bytes, 0x100U);
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ctx->current = ALIGN(ctx->current + bytes, 0x100U);
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break;
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break;
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case AMD_BIOS_PSP_SHARED_MEM:
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biosdir->entries[count].dest = fw_table[i].dest;
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biosdir->entries[count].size = fw_table[i].size;
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break;
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default: /* everything else is copied from input */
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default: /* everything else is copied from input */
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if (fw_table[i].type == AMD_BIOS_APCB ||
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if (fw_table[i].type == AMD_BIOS_APCB ||
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fw_table[i].type == AMD_BIOS_APCB_BK)
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fw_table[i].type == AMD_BIOS_APCB_BK)
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@ -1023,8 +1038,8 @@ static void integrate_bios_firmwares(context *ctx,
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fill_dir_header(biosdir, count, cookie);
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fill_dir_header(biosdir, count, cookie);
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}
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}
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// Unused values: CDEPR
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// Unused values: CDE
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static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:q";
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static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:qR:P:";
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static struct option long_options[] = {
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static struct option long_options[] = {
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{"xhci", required_argument, 0, 'x' },
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{"xhci", required_argument, 0, 'x' },
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@ -1076,6 +1091,8 @@ static struct option long_options[] = {
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{"flashsize", required_argument, 0, 'f' },
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{"flashsize", required_argument, 0, 'f' },
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{"location", required_argument, 0, 'l' },
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{"location", required_argument, 0, 'l' },
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{"anywhere", no_argument, 0, 'q' },
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{"anywhere", no_argument, 0, 'q' },
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{"sharedmem", required_argument, 0, 'R' },
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{"sharedmem-size", required_argument, 0, 'P' },
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{"help", no_argument, 0, 'h' },
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{"help", no_argument, 0, 'h' },
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{NULL, 0, 0, 0 }
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{NULL, 0, 0, 0 }
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};
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};
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@ -1399,6 +1416,16 @@ int main(int argc, char **argv)
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case 'q':
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case 'q':
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any_location = 1;
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any_location = 1;
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break;
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break;
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case 'R':
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/* shared memory destination */
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register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, 0, optarg, 0);
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sub = instance = 0;
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break;
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case 'P':
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/* shared memory size */
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register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, NULL, NULL, optarg);
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sub = instance = 0;
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break;
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case 'h':
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case 'h':
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usage();
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usage();
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