util/amdfwtool: Add option for setting PSP/FW shared memory location

This tells the PSP where in main memory to copy the vboot workbuf.

BUG=b:152576063
TEST=Build sharedmem destination into AMDFW, verify shared memory
gets placed at that location.

Signed-off-by: Martin Roth <martin@coreboot.org>
Original-Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Change-Id: Ie1e955e22632ca5cf146ac6eec0407091e81f519
Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2148830
Original-Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: Id324403afa6d5a5a65ce4709be31e7f16e038da0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42044
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2020-04-14 14:59:36 -06:00 committed by Martin Roth
parent 37305e78fc
commit 9455474f1b
1 changed files with 31 additions and 4 deletions

View File

@ -213,6 +213,8 @@ static void usage(void)
printf(" and must a multiple of 1024\n"); printf(" and must a multiple of 1024\n");
printf("-l | --location Location of Directory\n"); printf("-l | --location Location of Directory\n");
printf("-q | --anywhere Use any 64-byte aligned addr for Directory\n"); printf("-q | --anywhere Use any 64-byte aligned addr for Directory\n");
printf("-R | --sharedmem Location of PSP/FW shared memory\n");
printf("-P | --sharedmem-size Maximum size of the PSP/FW shared memory area\n");
printf("-h | --help show this help\n"); printf("-h | --help show this help\n");
} }
@ -226,6 +228,7 @@ typedef enum _amd_bios_type {
AMD_BIOS_UCODE = 0x66, AMD_BIOS_UCODE = 0x66,
AMD_BIOS_APCB_BK = 0x68, AMD_BIOS_APCB_BK = 0x68,
AMD_BIOS_MP2_CFG = 0x6a, AMD_BIOS_MP2_CFG = 0x6a,
AMD_BIOS_PSP_SHARED_MEM = 0x6b,
AMD_BIOS_L2_PTR = 0x70, AMD_BIOS_L2_PTR = 0x70,
AMD_BIOS_INVALID, AMD_BIOS_INVALID,
} amd_bios_type; } amd_bios_type;
@ -396,6 +399,7 @@ static amd_bios_entry amd_bios_table[] = {
{ .type = AMD_BIOS_UCODE, .inst = 1, .level = BDT_LVL2 }, { .type = AMD_BIOS_UCODE, .inst = 1, .level = BDT_LVL2 },
{ .type = AMD_BIOS_UCODE, .inst = 2, .level = BDT_LVL2 }, { .type = AMD_BIOS_UCODE, .inst = 2, .level = BDT_LVL2 },
{ .type = AMD_BIOS_MP2_CFG, .level = BDT_LVL2 }, { .type = AMD_BIOS_MP2_CFG, .level = BDT_LVL2 },
{ .type = AMD_BIOS_PSP_SHARED_MEM, .inst = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_INVALID }, { .type = AMD_BIOS_INVALID },
}; };
@ -481,7 +485,7 @@ typedef struct _bios_directory_table {
bios_directory_entry entries[]; bios_directory_entry entries[];
} bios_directory_table; } bios_directory_table;
#define MAX_BIOS_ENTRIES 0x2e #define MAX_BIOS_ENTRIES 0x2f
typedef struct _context { typedef struct _context {
char *rom; /* target buffer, size of flash device */ char *rom; /* target buffer, size of flash device */
@ -865,7 +869,8 @@ static void integrate_bios_firmwares(context *ctx,
fw_table[i].type != AMD_BIOS_APOB && fw_table[i].type != AMD_BIOS_APOB &&
fw_table[i].type != AMD_BIOS_APOB_NV && fw_table[i].type != AMD_BIOS_APOB_NV &&
fw_table[i].type != AMD_BIOS_L2_PTR && fw_table[i].type != AMD_BIOS_L2_PTR &&
fw_table[i].type != AMD_BIOS_BIN)) fw_table[i].type != AMD_BIOS_BIN &&
fw_table[i].type != AMD_BIOS_PSP_SHARED_MEM))
continue; continue;
/* BIOS Directory items may have additional requirements */ /* BIOS Directory items may have additional requirements */
@ -915,6 +920,11 @@ static void integrate_bios_firmwares(context *ctx,
} }
} }
/* PSP_SHARED_MEM needs a destination and size */
if (fw_table[i].type == AMD_BIOS_PSP_SHARED_MEM &&
(!fw_table[i].dest || !fw_table[i].size))
continue;
biosdir->entries[count].type = fw_table[i].type; biosdir->entries[count].type = fw_table[i].type;
biosdir->entries[count].region_type = fw_table[i].region_type; biosdir->entries[count].region_type = fw_table[i].region_type;
biosdir->entries[count].dest = fw_table[i].dest ? biosdir->entries[count].dest = fw_table[i].dest ?
@ -974,6 +984,11 @@ static void integrate_bios_firmwares(context *ctx,
ctx->current = ALIGN(ctx->current + bytes, 0x100U); ctx->current = ALIGN(ctx->current + bytes, 0x100U);
break; break;
case AMD_BIOS_PSP_SHARED_MEM:
biosdir->entries[count].dest = fw_table[i].dest;
biosdir->entries[count].size = fw_table[i].size;
break;
default: /* everything else is copied from input */ default: /* everything else is copied from input */
if (fw_table[i].type == AMD_BIOS_APCB || if (fw_table[i].type == AMD_BIOS_APCB ||
fw_table[i].type == AMD_BIOS_APCB_BK) fw_table[i].type == AMD_BIOS_APCB_BK)
@ -1023,8 +1038,8 @@ static void integrate_bios_firmwares(context *ctx,
fill_dir_header(biosdir, count, cookie); fill_dir_header(biosdir, count, cookie);
} }
// Unused values: CDEPR // Unused values: CDE
static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:q"; static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:qR:P:";
static struct option long_options[] = { static struct option long_options[] = {
{"xhci", required_argument, 0, 'x' }, {"xhci", required_argument, 0, 'x' },
@ -1076,6 +1091,8 @@ static struct option long_options[] = {
{"flashsize", required_argument, 0, 'f' }, {"flashsize", required_argument, 0, 'f' },
{"location", required_argument, 0, 'l' }, {"location", required_argument, 0, 'l' },
{"anywhere", no_argument, 0, 'q' }, {"anywhere", no_argument, 0, 'q' },
{"sharedmem", required_argument, 0, 'R' },
{"sharedmem-size", required_argument, 0, 'P' },
{"help", no_argument, 0, 'h' }, {"help", no_argument, 0, 'h' },
{NULL, 0, 0, 0 } {NULL, 0, 0, 0 }
}; };
@ -1399,6 +1416,16 @@ int main(int argc, char **argv)
case 'q': case 'q':
any_location = 1; any_location = 1;
break; break;
case 'R':
/* shared memory destination */
register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, 0, optarg, 0);
sub = instance = 0;
break;
case 'P':
/* shared memory size */
register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, NULL, NULL, optarg);
sub = instance = 0;
break;
case 'h': case 'h':
usage(); usage();