From 94ab3a8631620f62058d84040b36d5096133e085 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 20 Mar 2023 23:00:36 +0100 Subject: [PATCH] soc/intel/apl: Fix programming temporary MTRR on GLK Programming MTRR happens later in the CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT codepath. fast_spi_cache_bios_region() assumes an existing MTRR solution from x86_setup_mtrrs_with_detect(). This fixes a problem introduced by 829e8e6 "soc/intel: Use common codeflow for MP init". Change-Id: I9b6130cf76317440ebe7a7a53e460e2b658d198e Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/73836 Reviewed-by: Sean Rhodes Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index fec2607345..a5b8ef31f3 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -268,6 +268,10 @@ void mp_init_cpus(struct bus *cpu_bus) /* TODO: Handle mp_init_with_smm failure? */ mp_init_with_smm(cpu_bus, &mp_ops); + /* MTRR setup happens later, so we're done here. */ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT)) + return; + /* Temporarily cache the memory-mapped boot media. */ if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) && CONFIG(BOOT_DEVICE_SPI_FLASH))