From 94bbf0efc8ad69e18997dbb037b1609ff59aab32 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 4 Apr 2021 16:08:33 +0200 Subject: [PATCH] skylake DT/HALO mainboards: Drop `SaGv` setting MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SaGv is only supported on ULT/ULX hardware. Change-Id: I25001e97cce3193629e7fa7573bf9b352362d59b Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52097 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/mainboard/asrock/h110m/devicetree.cb | 1 - src/mainboard/intel/saddlebrook/devicetree.cb | 2 -- src/mainboard/supermicro/x11-lga1151-series/devicetree.cb | 1 - 3 files changed, 4 deletions(-) diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 74e5720b0c..0acba3aaf4 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -19,7 +19,6 @@ chip soc/intel/skylake # FSP Configuration register "PrimaryDisplay" = "Display_PEG" - register "SaGv" = "SaGv_Enabled" # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index d049db17a2..44ff902c5b 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -20,8 +20,6 @@ chip soc/intel/skylake register "ScsEmmcHs400Enabled" = "0" register "SkipExtGfxScan" = "1" - register "SaGv" = "SaGv_Enabled" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "0x02" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 76aec3f0ab..11966290a1 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -2,7 +2,6 @@ chip soc/intel/skylake # FSP Configuration register "SkipExtGfxScan" = "1" - register "SaGv" = "SaGv_Disabled" # SATA configuration register "SataSalpSupport" = "1"