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MAINTAINERS/RISCV: Cover mb/emulation/spike-riscv 

Change-Id: Id5f3f7f25041189d137ef4daa9f63a3b478763bc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16988
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Jonathan Neuschäfer 2016-10-12 00:18:00 +02:00 committed by Ronald G. Minnich
parent 3401f5a20c
commit 950d48fe6b
1 changed files with 1 additions and 1 deletions
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MAINTAINERS
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@ -124,7 +124,7 @@ M: Ronald Minnich <rminnich@gmail.com>
S: Maintained S: Maintained
F: src/arch/riscv/ F: src/arch/riscv/
F: src/soc/ucb/ F: src/soc/ucb/
F: src/mainboard/emulation/qemu-riscv/ F: src/mainboard/emulation/*-riscv/
POWER8 ARCHITECTURE POWER8 ARCHITECTURE
M: Ronald Minnich <rminnich@gmail.com> M: Ronald Minnich <rminnich@gmail.com>