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soc/intel: Refactor acpi_wake_source() 

Change-Id: I44cb499260fdd0ea37308909a24cdf5ca1afa025
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49879
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2021-01-22 20:02:39 +02:00
parent f67e67510b
commit 952e6b1ef8
3 changed files with 42 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
src/soc/intel/common/acpi_wake_source.c
View File

@ -17,23 +17,12 @@ __weak int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm
}
/* Save wake source data for ACPI _SWS methods in NVS */
static void acpi_save_wake_source(void *unused)
static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
{
struct global_nvs *gnvs = acpi_get_gnvs();
uint32_t pm1, *gpe0;
int gpe_reg, gpe_reg_count;
int reg_size = sizeof(uint32_t) * 8;
if (!gnvs)
return;
gnvs->pm1i = -1;
gnvs->gpei = -1;
const struct chipset_power_state *ps = acpi_get_pm_state();
if (!ps)
return;
gpe_reg_count = soc_fill_acpi_wake(ps, &pm1, &gpe0);
if (gpe_reg_count < 0)
return;
@ -76,4 +65,20 @@ static void acpi_save_wake_source(void *unused)
(long long)gnvs->pm1i, (long long)gnvs->gpei);
}
static void acpi_save_wake_source(void *unused)
{
const struct chipset_power_state *ps;
struct global_nvs *gnvs = acpi_get_gnvs();
if (!gnvs)
return;
gnvs->pm1i = -1;
gnvs->gpei = -1;
if (acpi_pm_state_for_wake(&ps) < 0)
return;
pm_fill_gnvs(gnvs, ps);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);

37
src/soc/intel/common/block/acpi/acpi.c
View File

@ -195,7 +195,6 @@ uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
return generic_pm1_en;
}
#if CONFIG(SOC_INTEL_COMMON_ACPI_WAKE_SOURCE)
/*
* Save wake source information for calculating ACPI _SWS values
*
@ -228,7 +227,6 @@ static int acpi_fill_wake(const struct chipset_power_state *ps, uint32_t *pm1, u
return GPE0_REG_MAX;
}
#endif
int common_calculate_power_ratio(int tdp, int p1_ratio, int ratio)
{
@ -441,25 +439,13 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor_cnot(num_virt);
}
#if CONFIG(SOC_INTEL_COMMON_ACPI_WAKE_SOURCE)
/* Save wake source data for ACPI _SWS methods in NVS */
static void acpi_save_wake_source(void *unused)
static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
{
struct global_nvs *gnvs = acpi_get_gnvs();
uint32_t pm1, *gpe0;
int gpe_reg, gpe_reg_count;
int reg_size = sizeof(uint32_t) * 8;
if (!gnvs)
return;
gnvs->pm1i = -1;
gnvs->gpei = -1;
const struct chipset_power_state *ps = acpi_get_pm_state();
if (!ps)
return;
gpe_reg_count = acpi_fill_wake(ps, &pm1, &gpe0);
if (gpe_reg_count < 0)
return;
@ -502,6 +488,23 @@ static void acpi_save_wake_source(void *unused)
(long long)gnvs->pm1i, (long long)gnvs->gpei);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
static void acpi_save_wake_source(void *unused)
{
if (!CONFIG(SOC_INTEL_COMMON_ACPI_WAKE_SOURCE))
return;
#endif
const struct chipset_power_state *ps;
struct global_nvs *gnvs = acpi_get_gnvs();
if (!gnvs)
return;
gnvs->pm1i = -1;
gnvs->gpei = -1;
if (acpi_pm_state_for_wake(&ps) < 0)
return;
pm_fill_gnvs(gnvs, ps);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);

6
src/soc/intel/denverton_ns/include/soc/nvs.h
View File

@ -45,8 +45,12 @@ struct __packed global_nvs {
u64 mmiohl; /* 0x4c - MMIO Base Limit */
u32 tsegb; /* 0x54 - TSEG Base Low */
u32 tsegl; /* 0x58 - TSEG Length/Size */
u8 rsvd3[164];
/* Just to satisfy common/block/acpi/acpi.c. */
u32 pm1i;
u32 gpei;
u8 rsvd3[156];
};
#endif /* _DENVERTON_NS_NVS_H_ */