Major CONFIG_IRQ_TABLE_COUNT fixing and cleanups. Some of these boards

and PIRQ tables were actually wrong, I cannot imagine they ever
worked properly.

 - Use CONFIG_IRQ_TABLE_COUNT in all irq_tables.c files instead of
   hard-coded numbers.

 - Make all CONFIG_IRQ_TABLE_COUNT values in irq_tables.c match Options.lb.

 - Make all CONFIG_IRQ_TABLE_COUNT values match the actual number of entries
   in the irq_tables.c file.

 - Set all CONFIG_IRQ_SLOT_COUNT values in src/.../Options.lb for those
   boards where they were set to 0 (in order to be overridden in
   the respective targets/.../Config.lb).

   This is mainly done to aid Patrick's scripts for kconfig conversion.

 - Fix a number of comments in irq_tables.c files.

 - Drop CONFIG_IRQ_SLOT_COUNT usage from boards that don't have irq_tables.c:
    - tyan/s1846
    - asus/a8v-e_se
    - asus/m2v-mx_se

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2009-10-07 21:51:33 +00:00
parent 17aeecab89
commit 95313d824d
86 changed files with 80 additions and 89 deletions

View File

@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

View File

@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -71,7 +71,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 9 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -73,7 +73,7 @@ default CONFIG_VIDEO_MB = 2
default CONFIG_ROM_SIZE = 256 * 1024 default CONFIG_ROM_SIZE = 256 * 1024
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 2 # Override this in targets/*/Config.lb.
default CONFIG_PIRQ_ROUTE = 1 default CONFIG_PIRQ_ROUTE = 1
default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_HAVE_MP_TABLE = 0

View File

@ -44,7 +44,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total 6 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */ 0x00, /* IRQs devoted exclusively to PCI usage */

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@ -44,7 +44,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total 6 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */ 0x00, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*2, /* there can be total 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0x800, /* IRQs devoted exclusively to PCI usage */ 0x800, /* IRQs devoted exclusively to PCI usage */

View File

@ -44,7 +44,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total 6 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */ 0x00, /* IRQs devoted exclusively to PCI usage */

View File

@ -73,7 +73,7 @@ default CONFIG_VIDEO_MB = 2
default CONFIG_ROM_SIZE = 256 * 1024 default CONFIG_ROM_SIZE = 256 * 1024
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 3 # Override this in targets/*/Config.lb.
default CONFIG_PIRQ_ROUTE = 1 default CONFIG_PIRQ_ROUTE = 1
default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_HAVE_MP_TABLE = 0

View File

@ -68,7 +68,7 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=5 # TODO? default CONFIG_IRQ_SLOT_COUNT=5
default CONFIG_PIRQ_ROUTE=1 default CONFIG_PIRQ_ROUTE=1
## ##

View File

@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0xe00, /* IRQs devoted exclusively to PCI usage */ 0xe00, /* IRQs devoted exclusively to PCI usage */

View File

@ -22,7 +22,6 @@ uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_HARD_RESET uses CONFIG_HAVE_HARD_RESET
uses CONFIG_IRQ_SLOT_COUNT
uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS uses CONFIG_MAX_CPUS
uses CONFIG_MAX_PHYSICAL_CPUS uses CONFIG_MAX_PHYSICAL_CPUS
@ -96,7 +95,6 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_HARD_RESET = 0 default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_HAVE_PIRQ_TABLE = 0 default CONFIG_HAVE_PIRQ_TABLE = 0
default CONFIG_IRQ_SLOT_COUNT = 11 # FIXME?
default CONFIG_HAVE_MP_TABLE = 1 default CONFIG_HAVE_MP_TABLE = 1
default CONFIG_HAVE_OPTION_TABLE = 0 # FIXME default CONFIG_HAVE_OPTION_TABLE = 0 # FIXME
# Move the default coreboot CMOS range off of AMD RTC registers. # Move the default coreboot CMOS range off of AMD RTC registers.

View File

@ -22,7 +22,6 @@ uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_HARD_RESET uses CONFIG_HAVE_HARD_RESET
uses CONFIG_IRQ_SLOT_COUNT
uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS uses CONFIG_MAX_CPUS
uses CONFIG_MAX_PHYSICAL_CPUS uses CONFIG_MAX_PHYSICAL_CPUS
@ -97,7 +96,6 @@ uses CONFIG_USE_PRINTK_IN_CAR
default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_HARD_RESET = 1 default CONFIG_HAVE_HARD_RESET = 1
default CONFIG_HAVE_PIRQ_TABLE = 0 default CONFIG_HAVE_PIRQ_TABLE = 0
default CONFIG_IRQ_SLOT_COUNT = 11 # FIXME?
default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_HAVE_MP_TABLE = 0
default CONFIG_HAVE_OPTION_TABLE = 1 # FIXME default CONFIG_HAVE_OPTION_TABLE = 1 # FIXME
# Move the default coreboot CMOS range off of AMD RTC registers. # Move the default coreboot CMOS range off of AMD RTC registers.

View File

@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 8 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024

View File

@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*11, /* there can be total 11 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x11<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x11<<3)|0x0, /* Where the interrupt router lies (dev) */
0xe20, /* IRQs devoted exclusively to PCI usage */ 0xe20, /* IRQs devoted exclusively to PCI usage */

View File

@ -74,7 +74,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 6 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

View File

@ -74,7 +74,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

View File

@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

View File

@ -71,7 +71,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 6 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 8 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 5 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -24,7 +24,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, PIRQ_SIGNATURE,
PIRQ_VERSION, PIRQ_VERSION,
32 + 16 * 9,/* Max. number of devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
0x00, /* Interrupt router bus */ 0x00, /* Interrupt router bus */
(0x11 << 3) | 0x0, /* Interrupt router device */ (0x11 << 3) | 0x0, /* Interrupt router device */
0xc20, /* IRQs devoted exclusively to PCI usage */ 0xc20, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0, /* Where the interrupt router lies (bus) */ 0, /* Where the interrupt router lies (bus) */
0x88, /* Where the interrupt router lies (dev) */ 0x88, /* Where the interrupt router lies (dev) */
0x1c20, /* IRQs devoted exclusively to PCI usage */ 0x1c20, /* IRQs devoted exclusively to PCI usage */

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@ -76,7 +76,7 @@ default CONFIG_HAVE_HARD_RESET=0
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=7 default CONFIG_IRQ_SLOT_COUNT=2
#object irq_tables.o #object irq_tables.o
## ##

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*7, /* there can be total 7 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -83,7 +83,7 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=6 default CONFIG_IRQ_SLOT_COUNT=9
default CONFIG_PIRQ_ROUTE=1 default CONFIG_PIRQ_ROUTE=1
#object irq_tables.o #object irq_tables.o

View File

@ -44,7 +44,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*9, /* There can be total 9 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0f<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x0f<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0x800, /* IRQs devoted exclusively to PCI usage */ 0x800, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*6, /* there can be total 6 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x01<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x01<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 6 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -16,7 +16,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*15, /* There can be total 19 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x0, /* Where the interrupt router lies (bus) */ 0x0, /* Where the interrupt router lies (bus) */
(0x2<<3)|0x4, (0x2<<3)|0x4,
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -78,7 +78,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=9 default CONFIG_IRQ_SLOT_COUNT=12
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -1,7 +1,6 @@
#include <arch/pirq_routing.h> #include <arch/pirq_routing.h>
#include <device/pci.h> #include <device/pci.h>
#define CONFIG_IRQ_SLOT_COUNT 12
#define IRQ_ROUTER_BUS 0 #define IRQ_ROUTER_BUS 0
#define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3) #define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3)
#define IRQ_ROUTER_VENDOR 0x1022 #define IRQ_ROUTER_VENDOR 0x1022

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@ -80,7 +80,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=9 default CONFIG_IRQ_SLOT_COUNT=12
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -1,7 +1,6 @@
#include <arch/pirq_routing.h> #include <arch/pirq_routing.h>
#include <device/pci.h> #include <device/pci.h>
#define CONFIG_IRQ_SLOT_COUNT 12
#define IRQ_ROUTER_BUS 0 #define IRQ_ROUTER_BUS 0
#define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3) #define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3)
#define IRQ_ROUTER_VENDOR 0x1022 #define IRQ_ROUTER_VENDOR 0x1022

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@ -28,7 +28,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*2, /* There can be a total of 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0xc00, /* IRQs devoted exclusively to PCI usage */ 0xc00, /* IRQs devoted exclusively to PCI usage */

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@ -47,7 +47,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total 6 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */ EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */

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@ -154,7 +154,7 @@ default CONFIG_MMCONF_BASE_ADDRESS=0xE0000000
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=18 default CONFIG_IRQ_SLOT_COUNT=9
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -23,7 +23,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * 9, /* Max. number of devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */
0x00, /* Interrupt router bus */ 0x00, /* Interrupt router bus */
(0x1f << 3) | 0x0, /* Interrupt router dev */ (0x1f << 3) | 0x0, /* Interrupt router dev */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -94,7 +94,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=9 default CONFIG_IRQ_SLOT_COUNT=18
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
320, /* u16 Table size 32+(16*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -20,7 +20,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, PIRQ_SIGNATURE,
PIRQ_VERSION, PIRQ_VERSION,
32 + 12*sizeof(struct irq_info), // Size of this struct in bytes 32 + 16 * CONFIG_IRQ_SLOT_COUNT, // Size of this struct in bytes
0, // PCI bus number on which the interrupt router resides 0, // PCI bus number on which the interrupt router resides
PCI_DEVFN(31, 0), // PCI device/function number of the interrupt router PCI_DEVFN(31, 0), // PCI device/function number of the interrupt router
0, // PCI-exclusive IRQ bitmap 0, // PCI-exclusive IRQ bitmap

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@ -79,7 +79,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=9 default CONFIG_IRQ_SLOT_COUNT=12
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*12, /* there can be total 12 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x07<<3)|0x3, /* Where the interrupt router lies (dev) */ (0x07<<3)|0x3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -24,7 +24,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*18, /* There can be total 18 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*2, /* there can be total 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0x800, /* IRQs devoted exclusively to PCI usage */ 0x800, /* IRQs devoted exclusively to PCI usage */

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@ -47,7 +47,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total 7 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */ 0x00, /* IRQs devoted exclusively to PCI usage */

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@ -47,7 +47,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* There can be total 7 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */ 0x00, /* IRQs devoted exclusively to PCI usage */

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 8 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -69,7 +69,7 @@ default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_HAVE_MP_TABLE = 0
default CONFIG_HAVE_HARD_RESET = 0 default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 4 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024

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@ -67,7 +67,7 @@ default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_HAVE_MP_TABLE = 0
default CONFIG_HAVE_HARD_RESET = 0 default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 5 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024

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@ -86,7 +86,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=15 default CONFIG_IRQ_SLOT_COUNT=9
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -3,7 +3,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*9, /* there can be total 9 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(4<<3)|3, /* Where the interrupt router lies (dev) */ (4<<3)|3, /* Where the interrupt router lies (dev) */
0x0, /* IRQs devoted exclusively to PCI usage */ 0x0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*2, /* there can be total 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0x800, /* IRQs devoted exclusively to PCI usage */ 0x800, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*2, /* there can be total 2 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
0x800, /* IRQs devoted exclusively to PCI usage */ 0x800, /* IRQs devoted exclusively to PCI usage */

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@ -23,7 +23,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total 7 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -70,7 +70,7 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 1 default CONFIG_HAVE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. default CONFIG_IRQ_SLOT_COUNT = 7 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -81,7 +81,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=16 default CONFIG_IRQ_SLOT_COUNT=15
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
272, /* u16 Table size 32+(16*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -81,7 +81,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=16 default CONFIG_IRQ_SLOT_COUNT=15
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
272, /* u16 Table size 32+(15*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -81,7 +81,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=16 default CONFIG_IRQ_SLOT_COUNT=15
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
272, /* u16 Table size 32+(15*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -81,7 +81,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=16 default CONFIG_IRQ_SLOT_COUNT=15
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
272, /* u16 Table size 32+(15*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -81,7 +81,7 @@ default CONFIG_HAVE_HARD_RESET=1
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=16 default CONFIG_IRQ_SLOT_COUNT=15
## ##
## Build code to export an x86 MP table ## Build code to export an x86 MP table

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@ -5,7 +5,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
0x52495024, /* u32 signature */ 0x52495024, /* u32 signature */
0x0100, /* u16 version */ 0x0100, /* u16 version */
272, /* u16 Table size 32+(15*devices) */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
0x00, /* u8 Bus 0 */ 0x00, /* u8 Bus 0 */
0xf8, /* u8 Device 1, Function 0 */ 0xf8, /* u8 Device 1, Function 0 */
0x0000, /* u16 reserve IRQ for PCI */ 0x0000, /* u16 reserve IRQ for PCI */

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@ -91,7 +91,7 @@ default CONFIG_HAVE_HARD_RESET=0
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
default CONFIG_HAVE_PIRQ_TABLE=1 default CONFIG_HAVE_PIRQ_TABLE=1
default CONFIG_IRQ_SLOT_COUNT=7 default CONFIG_IRQ_SLOT_COUNT=2
#object irq_tables.o #object irq_tables.o
## ##

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*7, /* there can be total 7 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -23,7 +23,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total 7 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -26,7 +26,6 @@ uses CONFIG_HAVE_HARD_RESET
uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_USE_OPTION_TABLE uses CONFIG_USE_OPTION_TABLE
uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD
uses CONFIG_IRQ_SLOT_COUNT
uses CONFIG_MAINBOARD uses CONFIG_MAINBOARD
uses CONFIG_MAINBOARD_VENDOR uses CONFIG_MAINBOARD_VENDOR
uses CONFIG_MAINBOARD_PART_NUMBER uses CONFIG_MAINBOARD_PART_NUMBER
@ -71,7 +70,6 @@ default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1 default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_HAVE_PIRQ_TABLE = 0 default CONFIG_HAVE_PIRQ_TABLE = 0
default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
default CONFIG_ROM_IMAGE_SIZE = 36 * 1024 default CONFIG_ROM_IMAGE_SIZE = 36 * 1024

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*15, /* there can be total 15 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*12, /* there can be total 12 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(2<<3)|3, /* Where the interrupt router lies (dev) */ (2<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*13, /* there can be total 13 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(5<<3)|3, /* Where the interrupt router lies (dev) */ (5<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*13, /* there can be total 13 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(4<<3)|3, /* Where the interrupt router lies (dev) */ (4<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -13,7 +13,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*15, /* there can be total 15 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(4<<3)|3, /* Where the interrupt router lies (dev) */ (4<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*22, /* there can be total 22 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(4<<3)|3, /* Where the interrupt router lies (dev) */ (4<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*22, /* there can be total 22 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
1, /* Where the interrupt router lies (bus) */ 1, /* Where the interrupt router lies (bus) */
(4<<3)|3, /* Where the interrupt router lies (dev) */ (4<<3)|3, /* Where the interrupt router lies (dev) */
0, /* IRQs devoted exclusively to PCI usage */ 0, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */
0xc20, /* IRQs devoted exclusively to PCI usage */ 0xc20, /* IRQs devoted exclusively to PCI usage */

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@ -16,7 +16,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*7, /* There can be total 7 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x11<<3)|0x0, /* Where the interrupt router lies (dev) */ (0x11<<3)|0x0, /* Where the interrupt router lies (dev) */
0x1c00, /* IRQs devoted exclusively to PCI usage */ 0x1c00, /* IRQs devoted exclusively to PCI usage */

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@ -10,7 +10,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */ 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0, /* Where the interrupt router lies (bus) */ 0, /* Where the interrupt router lies (bus) */
0x88, /* Where the interrupt router lies (dev) */ 0x88, /* Where the interrupt router lies (dev) */
0x1c20, /* IRQs devoted exclusively to PCI usage */ 0x1c20, /* IRQs devoted exclusively to PCI usage */

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@ -24,7 +24,7 @@
const struct irq_routing_table intel_irq_routing_table = { const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */ PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */ PIRQ_VERSION, /* u16 version */
32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* There can be total 15 devices on the bus */ 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
0x00, /* Where the interrupt router lies (bus) */ 0x00, /* Where the interrupt router lies (bus) */
(0x11 << 3) | 0x0, /* Where the interrupt router lies (dev) */ (0x11 << 3) | 0x0, /* Where the interrupt router lies (dev) */
0xc20, /* IRQs devoted exclusively to PCI usage */ 0xc20, /* IRQs devoted exclusively to PCI usage */

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@ -28,7 +28,6 @@ option CONFIG_MAINBOARD_PART_NUMBER = "S1846"
# TODO: Add/fix PIRQ table. # TODO: Add/fix PIRQ table.
option CONFIG_HAVE_PIRQ_TABLE = 0 option CONFIG_HAVE_PIRQ_TABLE = 0
option CONFIG_IRQ_SLOT_COUNT = 0 # FIXME
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9