This patch unifies the socket_mPGA604_800Mhz and socket_mPGA604_533Mhz to a

combined socket_mPGA604. No other sockets come with clock rates, and there is
no difference in code, except for the number of microcode patches included in a
build.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2009-04-22 08:56:50 +00:00 committed by Stefan Reinauer
parent da65fbf208
commit 953253f093
15 changed files with 21 additions and 34 deletions

View File

@ -1,4 +1,5 @@
config chip.h config chip.h
object socket_mPGA604_800Mhz.o object socket_mPGA604.o
dir /cpu/intel/model_f2x
dir /cpu/intel/model_f3x dir /cpu/intel/model_f3x
dir /cpu/intel/model_f4x dir /cpu/intel/model_f4x

View File

@ -3,5 +3,5 @@
struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops = { struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops = {
CHIP_NAME("Socket mPGA604 800Mhz CPU") CHIP_NAME("Socket mPGA604 CPU")
}; };

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@ -1,3 +0,0 @@
config chip.h
object socket_mPGA604_533Mhz.o
dir /cpu/intel/model_f2x

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@ -1,4 +0,0 @@
extern struct chip_operations cpu_intel_socket_mPGA604_533Mhz_ops;
struct cpu_intel_socket_mPGA604_533Mhz_config {
};

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@ -1,7 +0,0 @@
#include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA604_533Mhz_ops = {
CHIP_NAME("Socket mPGA604 533Mhz CPU")
};

View File

@ -193,10 +193,10 @@ chip northbridge/intel/e7520 # mch
device pci 06.0 on end device pci 06.0 on end
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # cpu 0 chip cpu/intel/socket_mPGA604 # cpu 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # cpu 1 chip cpu/intel/socket_mPGA604 # cpu 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -203,10 +203,10 @@ chip northbridge/intel/e7520
end end
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # cpu 0 chip cpu/intel/socket_mPGA604 # cpu 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # cpu 1 chip cpu/intel/socket_mPGA604 # cpu 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -212,10 +212,10 @@ chip northbridge/intel/e7501
end # SB end # SB
end # PCI_DOMAIN end # PCI_DOMAIN
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_533Mhz chip cpu/intel/socket_mPGA604
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_533Mhz chip cpu/intel/socket_mPGA604
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -187,10 +187,10 @@ chip northbridge/intel/e7525 # mch
device pci 08.0 on end device pci 08.0 on end
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # cpu0 chip cpu/intel/socket_mPGA604 # cpu0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # cpu1 chip cpu/intel/socket_mPGA604 # cpu1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -210,10 +210,10 @@ chip northbridge/intel/e7520 # MCH
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # CPU 0 chip cpu/intel/socket_mPGA604 # CPU 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # CPU 1 chip cpu/intel/socket_mPGA604 # CPU 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -210,10 +210,10 @@ chip northbridge/intel/e7520 # MCH
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # CPU 0 chip cpu/intel/socket_mPGA604 # CPU 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # CPU 1 chip cpu/intel/socket_mPGA604 # CPU 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -206,10 +206,10 @@ chip northbridge/intel/e7520 # mch
device pci 06.0 on end device pci 06.0 on end
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # cpu 0 chip cpu/intel/socket_mPGA604 # cpu 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # cpu 1 chip cpu/intel/socket_mPGA604 # cpu 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -197,10 +197,10 @@ chip northbridge/intel/e7520 # mch
device pci 06.0 on end device pci 06.0 on end
end end
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_800Mhz # cpu 0 chip cpu/intel/socket_mPGA604 # cpu 0
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_800Mhz # cpu 1 chip cpu/intel/socket_mPGA604 # cpu 1
device apic 6 on end device apic 6 on end
end end
end end

View File

@ -172,10 +172,10 @@ chip northbridge/intel/e7501
end # SB end # SB
end # PCI_DOMAIN end # PCI_DOMAIN
device apic_cluster 0 on device apic_cluster 0 on
chip cpu/intel/socket_mPGA604_533Mhz chip cpu/intel/socket_mPGA604
device apic 0 on end device apic 0 on end
end end
chip cpu/intel/socket_mPGA604_533Mhz chip cpu/intel/socket_mPGA604
device apic 6 on end device apic 6 on end
end end
end end