From 954af5293f3d72e8f389dff6f2a742f9fbdf56d7 Mon Sep 17 00:00:00 2001
From: Uwe Poeche <uwe.poeche@siemens.com>
Date: Tue, 24 May 2022 08:45:13 +0200
Subject: [PATCH] soc/intel/elkhartlake: Select
 SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR

Since of moving RAPL disabling to common code a config switch is
available to select that RAPL disabling has to be done via MCHBAR.
This patch selects the switch for EHL.

Test: Boot mc_ehl1 and ensure that relevant bits in MCHBAR are the same
as before the patch.

Change-Id: I1d0b7f650aa3ccf89c5c35d9b60a83a1ce48c74f
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
---
 src/soc/intel/elkhartlake/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 74e003d5af..fa5b4d26f3 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -65,6 +65,7 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select UDK_202005_BINDING
 	select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
+	select SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR
 
 config MAX_CPUS
 	int