soc/qualcomm/sc7280: Enable compression of SHRM
The SHRM region needs to be 4 byte aligned, which make enabling compression slightly more complicated. We need to map it to cached memory before loading it and flushing to memory (in aligned chunks) then remapping the address space back to device memory before beginning execution of the SHRM region. Also, did some cleanup in this file based on comments in CB:49392. BUG=b:182963902 BRANCH=None TEST=Make sure we can still boot to kernel on herobrine Change-Id: Iaad8a8a02abe40bd01766d94ef0b61aac7671936 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -107,7 +107,7 @@ SHRM_FILE := $(SC7280_BLOB)/shrm/shrm.elf
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SHRM_CBFS := $(CONFIG_CBFS_PREFIX)/shrm
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$(SHRM_CBFS)-file := $(SHRM_FILE)
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$(SHRM_CBFS)-type := payload
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$(SHRM_CBFS)-compression := none
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$(SHRM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
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cbfs-files-y += $(SHRM_CBFS)
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endif
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@ -1,22 +1,32 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/cache.h>
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#include <arch/mmu.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <soc/mmu.h>
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#include <soc/mmu_common.h>
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#include <soc/shrm.h>
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#include <soc/clock.h>
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#include <soc/symbols_common.h>
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void shrm_fw_load_reset(void)
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{
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bool shrm_fw_entry;
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struct prog shrm_fw_prog =
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PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/shrm");
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shrm_fw_entry = selfload(&shrm_fw_prog);
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if (!shrm_fw_entry)
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/* map to cached region to force address to be 4 byte aligned */
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mmu_config_range((void *)_shrm, REGION_SIZE(shrm), CACHED_RAM);
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if (!selfload(&shrm_fw_prog))
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die("SOC image: SHRM load failed");
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/* flush cached region */
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dcache_clean_by_mva(_shrm, REGION_SIZE(shrm));
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/* remap back to device memory */
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mmu_config_range((void *)_shrm, REGION_SIZE(shrm), DEV_MEM);
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clock_reset_shrm();
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printk(BIOS_DEBUG, "\nSOC:SHRM brought out of reset.\n");
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printk(BIOS_DEBUG, "SOC:SHRM brought out of reset.\n");
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}
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