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mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant 

Even though this GPIO isn't used for Kahlee, it needs to be defined
so that the weak version of the variant_board_id() function can
compile.

BUG=b:68293392
TEST=Build and boot kahlee

Change-Id: Ia8daf70fbafe02ec37c6b5eb8421cdb11de3be8b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Martin Roth 2017-11-07 14:08:02 -07:00
parent 07132a4c32
commit 95afc46382
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
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@ -22,6 +22,12 @@
#define MEM_CONFIG0 GPIO_135 #define MEM_CONFIG0 GPIO_135
#define MEM_CONFIG1 GPIO_140 #define MEM_CONFIG1 GPIO_140
#define MEM_CONFIG2 GPIO_144 #define MEM_CONFIG2 GPIO_144
/*
* Kahlee only uses 3 GPIOs to determine memory configuration, but other
* variants use 4. MEM_CONFIG3 must be defined so that the weak baseboard
* version of the variant_board_id() function can compile.
*/
#define MEM_CONFIG3 0
/* SPI Write protect */ /* SPI Write protect */
#define CROS_WP_GPIO GPIO_142 #define CROS_WP_GPIO GPIO_142