From 95b4ece0fe4a0855f20bfb7bdf868c56f6b41ae6 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Mon, 4 May 2020 15:58:48 -0700 Subject: [PATCH] device: Add a disabling PCIe device bus master function A function pci_dev_disable_bus_master() is created. This function can be used to disable Thunderbolt PCIe root ports, bridges and devices for Vt-d based security platform at end of boot service. BUG=None TEST=Verified PCIe device bus master enable bit is cleared. Signed-off-by: John Zhao Change-Id: Ie92a15bf2c66fdc311098acb81019d4fb7f68313 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41042 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/device/pci_device.c | 5 +++++ src/include/device/pci.h | 1 + 2 files changed, 6 insertions(+) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index f83520e079..032e15c669 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1643,4 +1643,9 @@ void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]) #endif } } + +void pci_dev_disable_bus_master(const struct device *dev) +{ + pci_update_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER, 0x0); +} #endif diff --git a/src/include/device/pci.h b/src/include/device/pci.h index f091105438..4529074e9b 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -127,6 +127,7 @@ static inline int pci_base_address_is_memory_space(unsigned int attr) return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY; } +void pci_dev_disable_bus_master(const struct device *dev); #endif /* CONFIG_PCI */ void pci_early_bridge_init(void);