iwave/iWRainbowG6: use 16bit access for a register which is not 32bit aligned
The PCI registers should be accessed aligned and 0x62 is not 32bit aligned therefore this patch changes it to a 16bit access. Change-Id: I00725a4569f471eedb061834f626911b42e734fb Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Reviewed-on: http://review.coreboot.org/1631 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
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@ -321,11 +321,11 @@ static void poulsbo_setup_Stage1Regs(void)
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static void poulsbo_setup_Stage2Regs(void)
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{
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u32 reg32;
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u16 reg16;
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printk(BIOS_DEBUG, "Reserved");
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reg32 = pci_read_config32(PCI_DEV(0, 0x2, 0), 0x62);
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pci_write_config32(PCI_DEV(0, 0x2, 0), 0x62, (reg32 | 0x3));
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reg16 = pci_read_config16(PCI_DEV(0, 0x2, 0), 0x62);
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pci_write_config16(PCI_DEV(0, 0x2, 0), 0x62, (reg16 | 0x3));
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/* Slot capabilities */
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pci_write_config32(PCI_DEV(0, 28, 0), 0x54, 0x80500);
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pci_write_config32(PCI_DEV(0, 28, 1), 0x54, 0x100500);
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