soc/intel/meteorlake: Drop enable_bios_reset_cpl() function
This patch drops enable_bios_reset_cpl() as FSP sets the BIOS Reset
CPL before performing Graphics PM init (as part of FSP-S), hence,
enable_bios_reset_cpl() function getting called inside systemagent.c
is meaningless.
Also, drop 1ms delay after setting the BIOS reset CPL.
This patch is backported from
commit 3f980ca7be
(soc/intel/alderlake:
Drop enable_bios_reset_cpl() function).
Change-Id: Ia31867153b3b5f132c393a605c44616acfd7a34b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70556
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
This commit is contained in:
parent
decb9717ce
commit
95fc5d776a
|
@ -54,11 +54,6 @@ void soc_systemagent_init(struct device *dev)
|
||||||
/* Enable Power Aware Interrupt Routing */
|
/* Enable Power Aware Interrupt Routing */
|
||||||
enable_power_aware_intr();
|
enable_power_aware_intr();
|
||||||
|
|
||||||
/* Enable BIOS Reset CPL */
|
|
||||||
enable_bios_reset_cpl();
|
|
||||||
|
|
||||||
/* Configure turbo power limits 1ms after reset complete bit */
|
|
||||||
mdelay(1);
|
|
||||||
config = config_of_soc();
|
config = config_of_soc();
|
||||||
|
|
||||||
/* Get System Agent PCI ID */
|
/* Get System Agent PCI ID */
|
||||||
|
|
Loading…
Reference in New Issue