mainboard: Format irq_tables.c

Run the command below to format the files `irq_tables.c` of (mostly AMD)
mainboards correctly with GNU indent 2.2.10.

```
$ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l
```

Fix up the following two checkpatch.pl errors manually.

```
ERROR: that open brace { should be on the previous line
#1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129:
+			uint8_t reg[8] =
+			    { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 };

ERROR: that open brace { should be on the previous line
#1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131:
+			uint8_t irq[8] =
+			    { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 };

```

This is needed, so that follow-up commits, fixing checkpatch.pl errors
and warnings, won’t run into conflicts with the git commit hooks, when
for example, spaces instead of tabs are used for indentation.

Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/15932
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Paul Menzel 2016-07-28 17:20:20 +02:00 committed by Martin Roth
parent 14caed85e1
commit 95fe8fb1e0
68 changed files with 1037 additions and 983 deletions

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -79,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 sbdn_sb600;

View File

@ -20,8 +20,10 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -40,9 +42,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -51,7 +50,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
uint8_t sum = 0;
int i;
struct mb_sysconf_t *m;
@ -68,13 +67,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -85,12 +84,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
{
device_t dev;
dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
dev =
dev_find_slot(m->bus_8111_0,
PCI_DEVFN(sysconf.sbdn + 1, 3));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
@ -107,15 +108,20 @@ unsigned long write_pirq_routing_table(unsigned long addr)
//pci bridge
printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n");
static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 };
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn+1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn + 1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
printk(BIOS_DEBUG, "setting Onboard AMD USB\n");
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11};
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11 };
pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0);
write_pirq_info(pirq_info, m->bus_8111_1,0, 0, 0, 0, 0, 0, 0, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_8111_1, 0, 0, 0, 0, 0, 0, 0, 0x4,
0xdef8, 0, 0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
@ -123,13 +129,16 @@ unsigned long write_pirq_routing_table(unsigned long addr)
int j = 0;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
j++;
}
@ -147,6 +156,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

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@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -23,8 +22,9 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, u8 link0, u16 bitmap0,
u8 link1, u16 bitmap1, u8 link2, u16 bitmap2,u8 link3, u16 bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
{
pirq_info->bus = bus;
@ -41,9 +41,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, u8 lin
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -52,7 +49,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
u32 slot_num;
u8 *v;
u8 sum=0;
u8 sum = 0;
int i;
struct mb_sysconf_t *m;
@ -69,13 +66,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (u8 *)(addr);
v = (u8 *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,38 +83,47 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
// pirq_info++; slot_num++;
int j=0;
int j = 0;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
u32 busn = (sysconf.pci1234[i] >> 12) & 0xff;
u32 devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
j++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@ -135,6 +141,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,8 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam12.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -81,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

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@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

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@ -59,6 +59,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_sr5650[14];
extern u8 bus_sp5100[2];
@ -107,8 +108,9 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
LNKA, IRQBM, LNKB, IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
write_pirq_info(pirq_info, bus_sp5100[0],
((sbdn_sp5100 + 0x14) << 3) | 4, LNKA, IRQBM, LNKB,
IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
pirq_info++;
slot_num++;

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@ -59,6 +59,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_sr5650[14];
extern u8 bus_sp5100[2];
@ -107,8 +108,9 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
LNKA, IRQBM, LNKB, IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
write_pirq_info(pirq_info, bus_sp5100[0],
((sbdn_sp5100 + 0x14) << 3) | 4, LNKA, IRQBM, LNKB,
IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
pirq_info++;
slot_num++;

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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

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@ -6,8 +6,10 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -33,8 +35,6 @@ extern unsigned apicid_bcm5785[3];
extern unsigned sbdn2;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -43,7 +43,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf();
@ -56,13 +56,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_bcm5785_0;
pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
pirq->rtr_devfn = (sysconf.sbdn << 3) | 0;
pirq->exclusive_irqs = 0;
@ -75,11 +75,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -94,6 +96,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

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@ -25,8 +25,10 @@
#include <device/pci_ids.h>
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,6 +44,7 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_sis966[8]; //1
unsigned long write_pirq_routing_table(unsigned long addr)
@ -53,7 +56,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -67,7 +70,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
@ -84,11 +87,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
write_pirq_info(pirq_info, 0, PCI_DEVFN(2, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, 0, PCI_DEVFN(2, 0), 0x1, 0xdef8, 0x2, 0xdef8,
0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -105,7 +110,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
{
device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(2,0));
dev = dev_find_slot(0, PCI_DEVFN(2, 0));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
@ -120,39 +125,44 @@ unsigned long write_pirq_routing_table(unsigned long addr)
PINTH = IRQ7
*/
uint8_t reg[8]={0x41,0x42,0x43,0x44,0x60,0x61,0x62,0x63};
uint8_t irq[8]={0x0A,0X0B,0X0,0X0a,0X0B,0X05,0X0,0X07};
uint8_t reg[8] = {
0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63
};
uint8_t irq[8] = {
0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07
};
for(i=0;i<8;i++)
for (i = 0; i < 8; i++)
pci_write_config8(dev, reg[i], irq[i]);
} // endif
printk(BIOS_DEBUG, "Setting Onboard SiS Southbridge\n");
dev = dev_find_slot(0, PCI_DEVFN(2,5)); // 5513 (IDE)
dev = dev_find_slot(0, PCI_DEVFN(2, 5)); // 5513 (IDE)
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(3,0)); // USB 1.1
dev = dev_find_slot(0, PCI_DEVFN(3, 0)); // USB 1.1
pci_write_config8(dev, 0x3C, 0x0B);
dev = dev_find_slot(0, PCI_DEVFN(3,1)); // USB 1.1
dev = dev_find_slot(0, PCI_DEVFN(3, 1)); // USB 1.1
pci_write_config8(dev, 0x3C, 0x05);
dev = dev_find_slot(0, PCI_DEVFN(3,3)); // USB 2.0
dev = dev_find_slot(0, PCI_DEVFN(3, 3)); // USB 2.0
pci_write_config8(dev, 0x3C, 0x07);
dev = dev_find_slot(0, PCI_DEVFN(4,0)); // 191 (LAN)
dev = dev_find_slot(0, PCI_DEVFN(4, 0)); // 191 (LAN)
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(5,0)); // 1183 (SATA)
dev = dev_find_slot(0, PCI_DEVFN(5, 0)); // 1183 (SATA)
pci_write_config8(dev, 0x3C, 0x0B);
dev = dev_find_slot(0, PCI_DEVFN(6,0)); // PCI-E
dev = dev_find_slot(0, PCI_DEVFN(6, 0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(7,0)); // PCI-E
dev = dev_find_slot(0, PCI_DEVFN(7, 0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(15,0)); // Azalia
dev = dev_find_slot(0, PCI_DEVFN(15, 0)); // Azalia
pci_write_config8(dev, 0x3C, 0x05);
}
printk(BIOS_DEBUG, "pirq routing table, size=%d\n", pirq->size);
for (i = 0; i < pirq->size; i+=4)
printk(BIOS_DEBUG, "%.2x%.2x%.2x%.2x\n", v[i+3],v[i+2],v[i+1],v[i]);
for (i = 0; i < pirq->size; i += 4)
printk(BIOS_DEBUG, "%.2x%.2x%.2x%.2x\n", v[i + 3], v[i + 2],
v[i + 1], v[i]);
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -23,8 +23,10 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -40,10 +42,9 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_mcp55[8]; //1
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -53,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -67,13 +68,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -84,11 +85,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -103,6 +106,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -22,7 +21,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -81,19 +79,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -7,8 +7,10 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -33,7 +35,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
struct mb_sysconf_t *m = sysconf.mb;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -46,13 +48,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -63,16 +65,20 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8131_0, (m->sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
// pirq_info++; slot_num++;
pirq_info++; slot_num++;
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -87,6 +93,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -7,8 +7,10 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -27,9 +29,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -38,7 +37,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
uint8_t sum = 0;
int i;
struct mb_sysconf_t *m;
@ -55,13 +54,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -72,12 +71,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
{
device_t dev;
dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
dev =
dev_find_slot(m->bus_8111_0,
PCI_DEVFN(sysconf.sbdn + 1, 3));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
@ -94,15 +95,20 @@ unsigned long write_pirq_routing_table(unsigned long addr)
//pci bridge
printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n");
static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 };
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn+1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn + 1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
printk(BIOS_DEBUG, "setting Onboard AMD USB\n");
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11};
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11 };
pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0);
write_pirq_info(pirq_info, m->bus_8111_1,0, 0, 0, 0, 0, 0, 0, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_8111_1, 0, 0, 0, 0, 0, 0, 0, 0x4,
0xdef8, 0, 0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
@ -110,13 +116,16 @@ unsigned long write_pirq_routing_table(unsigned long addr)
int j = 0;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
j++;
}
@ -134,6 +143,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <cpu/amd/amdfam14.h>
@ -21,7 +20,6 @@
#include <string.h>
#include <stdint.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

View File

@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -33,7 +33,6 @@
extern unsigned char bus_ck804[6];
/**
* Add one line to IRQ table.
*/
@ -204,7 +203,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* Bus, device, slots IRQs for {A,B,C,D}. */
irq[0] = 10; /* SMBus */ /* test me */
irq[0] = 10; /* SMBus *//* test me */
pci_assign_irqs(bus_ck804[0], 1, irq);
irq[0] = 10; /* USB */
@ -224,7 +223,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
irq[0] = 10; /* Ethernet */
pci_assign_irqs(bus_ck804[0], 10, irq);
/* physical slots */
irq[0] = 5; /* PCI E1 - x1 */

View File

@ -27,9 +27,10 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -48,8 +49,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -58,7 +57,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
uint8_t sum = 0;
int i;
struct mb_sysconf_t *m;
@ -75,13 +74,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_bcm5785_0;
pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
pirq->rtr_devfn = (sysconf.sbdn << 3) | 0;
pirq->exclusive_irqs = 0;
@ -92,11 +91,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_bcm5785_0, (sysconf.sbdn << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -111,6 +113,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -27,8 +27,10 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -45,8 +47,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -57,7 +57,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -72,13 +72,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -89,19 +89,24 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
pirq->size = 32 + 16 * slot_num;
@ -117,6 +122,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,27 +86,37 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@ -123,6 +133,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55;
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,19 +86,24 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
pirq->size = 32 + 16 * slot_num;
@ -114,6 +119,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -58,6 +57,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;
@ -103,12 +103,16 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_sb600[0], ((sbdn_sb600 + 0x14) << 3) | 4, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 1, 0);
write_pirq_info(pirq_info, bus_sb600[0], ((sbdn_sb600 + 0x14) << 3) | 4,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 1,
0);
pirq_info++;
slot_num++;
/* ide */
write_pirq_info(pirq_info, bus_sb600[0], ((sbdn_sb600 + 0x14) << 3) | 1, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 1, 0);
write_pirq_info(pirq_info, bus_sb600[0], ((sbdn_sb600 + 0x14) << 3) | 1,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 1,
0);
pirq_info++;
slot_num++;

View File

@ -5,8 +5,10 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -32,12 +34,12 @@ extern unsigned char bus_ck804_5; //6
extern unsigned char bus_8131_0; //7
extern unsigned char bus_8131_1; //8
extern unsigned char bus_8131_2; //9
extern unsigned char bus_ck804b_0;//a
extern unsigned char bus_ck804b_1;//b
extern unsigned char bus_ck804b_2;//c
extern unsigned char bus_ck804b_3;//d
extern unsigned char bus_ck804b_4;//e
extern unsigned char bus_ck804b_5;//f
extern unsigned char bus_ck804b_0; //a
extern unsigned char bus_ck804b_1; //b
extern unsigned char bus_ck804b_2; //c
extern unsigned char bus_ck804b_3; //d
extern unsigned char bus_ck804b_4; //e
extern unsigned char bus_ck804b_5; //f
extern unsigned pci1234[];
@ -46,8 +48,6 @@ extern unsigned hcdn[];
extern unsigned sbdn3;
extern unsigned sbdnb;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -56,7 +56,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_ck804_0;
pirq->rtr_devfn = ((sbdn+9)<<3)|0;
pirq->rtr_devfn = ((sbdn + 9) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,75 +86,112 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 9) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
//pcix bridge
write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_8131_0, (sbdn3 << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if(pci1234[2] & 0xf) {
if (pci1234[2] & 0xf) {
//second pci beidge
write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb + 9) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4,
0xdef8, 0x0, 0);
pirq_info++;
slot_num++;
}
#if 0
//smbus
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+1)<<3)|0, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 1) << 3) | 0, 0x2,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//usb
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+2)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 2) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//audio
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+4)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 4) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//sata
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+7)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 7) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//sata
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+8)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 8) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//nic
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 0xa) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot1 PCIE x16
write_pirq_info(pirq_info, bus_ck804_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 1, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_5, (0 << 3) | 0, 0x3, 0xdef8, 0x4,
0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 1, 0);
pirq_info++;
slot_num++;
//firewire
write_pirq_info(pirq_info, bus_ck804_1, (0x5<<3)|0, 0x3, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_1, (0x5 << 3) | 0, 0x3, 0xdef8, 0,
0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot2 pci
write_pirq_info(pirq_info, bus_ck804_1, (0x4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_1, (0x4 << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
pirq_info++;
slot_num++;
//nic
write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb + 0xa) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot3 PCIE x16
write_pirq_info(pirq_info, bus_ck804b_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 3, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804b_5, (0 << 3) | 0, 0x3, 0xdef8, 0x4,
0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 3, 0);
pirq_info++;
slot_num++;
//Slot4 PCIX
write_pirq_info(pirq_info, bus_8131_2, (4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 4, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_8131_2, (4 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 4, 0);
pirq_info++;
slot_num++;
//Slot5 PCIX
write_pirq_info(pirq_info, bus_8131_2, (9<<3)|0, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 5, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_8131_2, (9 << 3) | 0, 0x2, 0xdef8, 0x3,
0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 5, 0);
pirq_info++;
slot_num++;
//onboard scsi
write_pirq_info(pirq_info, bus_8131_2, (6<<3)|0, 0x2, 0xdef8, 0x3, 0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_8131_2, (6 << 3) | 0, 0x2, 0xdef8, 0x3,
0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot6 PCIX
write_pirq_info(pirq_info, bus_8131_1, (4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 6, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_8131_1, (4 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 6, 0);
pirq_info++;
slot_num++;
#endif
pirq->size = 32 + 16 * slot_num;
@ -170,6 +207,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55;
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,19 +86,24 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
pirq->size = 32 + 16 * slot_num;
@ -114,6 +119,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -23,8 +23,10 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -40,11 +42,10 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +55,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -68,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -85,11 +86,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -104,6 +107,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -23,8 +23,10 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -40,11 +42,10 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +55,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -68,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -85,11 +86,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
@ -104,6 +107,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,27 +86,37 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@ -123,6 +133,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,27 +86,37 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0x4ca0,
0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++;
slot_num++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0x4ca0, 0x2,
0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@ -123,6 +133,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sp5100[2];
@ -87,9 +86,9 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
write_pirq_info(pirq_info, bus_sp5100[0],
((sbdn_sp5100 + 0x14) << 3) | 4, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

View File

@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,19 +86,24 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
pirq->size = 32 + 16 * slot_num;
@ -114,6 +119,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -24,8 +24,10 @@
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -42,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -54,7 +54,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55[0];
pirq->rtr_devfn = ((sbdn+6)<<3)|0;
pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -86,27 +86,37 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@ -123,6 +133,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

View File

@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

View File

@ -6,8 +6,10 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
@ -40,7 +42,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
uint8_t *v;
unsigned sbdn;
uint8_t sum=0;
uint8_t sum = 0;
int i;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
@ -54,13 +56,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_ck804_0;
pirq->rtr_devfn = ((sbdn+9)<<3)|0;
pirq->rtr_devfn = ((sbdn + 9) << 3) | 0;
pirq->exclusive_irqs = 0;
@ -71,45 +73,65 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 9) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
#if 0
//smbus
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+1)<<3)|0, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 1) << 3) | 0, 0x2,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//usb
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+2)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 2) << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//audio
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+4)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 4) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//sata
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+7)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 7) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//sata
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+8)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 8) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//nic
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn + 0xa) << 3) | 0, 0x1,
0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot1 PCIE x16
write_pirq_info(pirq_info, bus_ck804_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 1, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_5, (0 << 3) | 0, 0x3, 0xdef8, 0x4,
0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 1, 0);
pirq_info++;
slot_num++;
//firewire
write_pirq_info(pirq_info, bus_ck804_1, (0x5<<3)|0, 0x3, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_1, (0x5 << 3) | 0, 0x3, 0xdef8, 0,
0, 0, 0, 0, 0, 0, 0);
pirq_info++;
slot_num++;
//Slot2 pci
write_pirq_info(pirq_info, bus_ck804_1, (0x4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, bus_ck804_1, (0x4 << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
pirq_info++;
slot_num++;
#endif
pirq->size = 32 + 16 * slot_num;
@ -125,6 +147,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}