kbuild: Don't require intel/common changes for every soc

In the true spirit of separating components more strictly
and allowing to add new components to coreboot without touching
existing code, move Intel common code selection to the soc
Kconfig and out of src/soc/intel/common/Makefile.inc

Change-Id: I0a70656bb9f4550b6088e9f45e68b5106c0eb9af
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10031
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/soc/intel/baytrail/Kconfig

@@ -37,6 +37,7 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_MONOTONIC_TIMER
 	select TSC_SYNC_MFENCE
 	select UDELAY_TSC
+	select SOC_INTEL_COMMON
 
 config BOOTBLOCK_CPU_INIT
 	string

src/soc/intel/broadwell/Kconfig

@@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_SYNC_MFENCE
 	select UDELAY_TSC
 	select PER_DEVICE_ACPI_TABLES
+	select SOC_INTEL_COMMON
 
 config BOOTBLOCK_CPU_INIT
 	string

src/soc/intel/common/Kconfig

@@ -1,3 +1,8 @@
+config SOC_INTEL_COMMON
+	bool
+	help
+	  common code for Intel SOCs
+
 if HAVE_MRC
 
 config CACHE_MRC_SETTINGS

src/soc/intel/common/Makefile.inc

@@ -1,4 +1,4 @@
-ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL)$(CONFIG_SOC_INTEL_BROADWELL),y)
+ifeq ($(CONFIG_SOC_INTEL_COMMON),y)
 
 ramstage-y += hda_verb.c
 ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c