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nb/intel/i945/bootblock.c: Correct comment 

Change-Id: Ic28ff80eb1dae6d0a307e2a1b73e8129fffbac13
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2018-05-09 21:23:25 +02:00 committed by Patrick Georgi
parent 322fa32e5e
commit 96184e9f2d
1 changed files with 2 additions and 2 deletions
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4
src/northbridge/intel/i945/bootblock.c
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@ -9,8 +9,8 @@ static void bootblock_northbridge_init(void)
/*
* The "io" variant of the config access is explicitly used to
* setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT is set to
* to true. That way all subsequent non-explicit config accesses use
* setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT is set to true.
* That way all subsequent non-explicit config accesses use
* MCFG. This code also assumes that bootblock_northbridge_init() is
* the first thing called in the non-asm boot block code. The final
* assumption is that no assembly code is using the