tegra132: Change all SoC headers to <soc/headername.h> system

This patch aligns tegra132 to the new SoC header include scheme.
Also alphabetized headers in affected files since we touch them anyway.

BUG=None
TEST=Tested with whole series. Compiled Rush_Ryu.

Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591
Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224505
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9369
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/google/rush/boardid.c

@@ -17,10 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
-
 #include <boardid.h>
+#include <console/console.h>
+#include <soc/gpio.h>
 
 uint8_t board_id(void)
 {

src/mainboard/google/rush/bootblock.c

@@ -21,13 +21,13 @@
 #include <console/console.h>
 #include <device/i2c.h>
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/bootblock.h>
 #include <soc/clock.h>
-#include <soc/padconfig.h>
 #include <soc/funitcfg.h>
 #include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h>	/* FIXME: move back to soc code? */
+#include <soc/padconfig.h>
+#include <soc/spi.h>	/* FIXME: move back to soc code? */
 
 #include "pmic.h"
 

src/mainboard/google/rush/chromeos.c

@@ -21,9 +21,9 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
+#include <soc/gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <soc/nvidia/tegra132/gpio.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {

src/mainboard/google/rush/mainboard.c

@@ -18,17 +18,16 @@
  */
 
 #include <arch/mmu.h>
-#include <device/device.h>
 #include <boot/coreboot_tables.h>
-
+#include <device/device.h>
 #include <memrange.h>
-#include <soc/clock.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h>
 #include <soc/addressmap.h>
-#include <soc/padconfig.h>
+#include <soc/clk_rst.h>
+#include <soc/clock.h>
 #include <soc/funitcfg.h>
 #include <soc/nvidia/tegra/usb.h>
+#include <soc/padconfig.h>
+#include <soc/spi.h>
 
 static const struct pad_config sdmmc3_pad[] = {
 	/* MMC3(SDCARD) */

src/mainboard/google/rush/memlayout.ld

@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>

src/mainboard/google/rush/pmic.c

@@ -18,13 +18,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <boardid.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/i2c.h>
 #include <stdint.h>
 #include <stdlib.h>
 
-#include <boardid.h>
 #include "pmic.h"
 #include "reset.h"
 

src/mainboard/google/rush/reset.c

@@ -18,8 +18,8 @@
  */
 
 #include <arch/io.h>
+#include <soc/gpio.h>
 #include <reset.h>
-#include <soc/nvidia/tegra132/gpio.h>
 
 void hard_reset(void)
 {

src/mainboard/google/rush/romstage.c

@@ -17,13 +17,12 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <soc/romstage.h>
-
 #include <soc/addressmap.h>
 #include <soc/clock.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra/i2c.h>
 #include <soc/funitcfg.h>
+#include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
+#include <soc/romstage.h>
 
 static const struct pad_config padcfgs[] = {
 	/* SOC_WARM_RESET_L */

src/mainboard/google/rush_ryu/boardid.c

@@ -17,11 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <boardid.h>
 #include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
 #include <stdlib.h>
 
-#include <boardid.h>
 #include "gpio.h"
 
 /*

src/mainboard/google/rush_ryu/bootblock.c

@@ -22,11 +22,11 @@
 #include <device/i2c.h>
 #include <soc/addressmap.h>
 #include <soc/bootblock.h>
+#include <soc/clk_rst.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
+#include <soc/padconfig.h>
 
 #include "pmic.h"
 

src/mainboard/google/rush_ryu/chromeos.c

@@ -23,6 +23,7 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+
 #include "gpio.h"
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/rush_ryu/gpio.h

@@ -20,7 +20,7 @@
 #ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 #define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
 
 /* Board ID definitions. */
 enum {

src/mainboard/google/rush_ryu/mainboard.c

@@ -18,16 +18,15 @@
  */
 
 #include <arch/mmu.h>
-#include <device/device.h>
 #include <boot/coreboot_tables.h>
+#include <device/device.h>
 #include <memrange.h>
-
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
 #include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
 
 static const struct pad_config mmcpads[] = {
 	/* MMC4 (eMMC) */

src/mainboard/google/rush_ryu/memlayout.ld

@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>

src/mainboard/google/rush_ryu/pmic.c

@@ -23,6 +23,7 @@
 #include <device/i2c.h>
 #include <stdint.h>
 #include <stdlib.h>
+
 #include "pmic.h"
 #include "reset.h"
 

src/mainboard/google/rush_ryu/reset.c

@@ -19,6 +19,7 @@
 
 #include <arch/io.h>
 #include <reset.h>
+
 #include "gpio.h"
 
 void hard_reset(void)

src/mainboard/google/rush_ryu/romstage.c

@@ -21,9 +21,10 @@
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
 #include <soc/romstage.h>
+
 #include "gpio.h"
 #include "pmic.h"
 

src/soc/nvidia/tegra132/addressmap.c

@@ -19,13 +19,13 @@
 
 
 #include <arch/io.h>
-#include <stdlib.h>
 #include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/id.h>
+#include <soc/mc.h>
+#include <soc/sdram.h>
+#include <stdlib.h>
 #include <symbols.h>
-#include "mc.h"
-#include "sdram.h"
 
 static uintptr_t tz_base_mib;
 static const size_t tz_size_mib = CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB;

src/soc/nvidia/tegra132/bootblock.c

@@ -26,8 +26,7 @@
 #include <soc/bootblock.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
-
-#include "power.h"
+#include <soc/power.h>
 
 #define BCT_OFFSET_IN_BIT	0x50
 #define ODMDATA_OFFSET_IN_BCT	0x6A8

src/soc/nvidia/tegra132/cbfs.c

@@ -17,12 +17,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
 #include <cbfs.h>  /* This driver serves as a CBFS media source. */
+#include <soc/spi.h>
 #include <symbols.h>
 
-#include "spi.h"
-
 int init_default_cbfs_media(struct cbfs_media *media)
 {
 	return initialize_tegra_spi_cbfs_media(media,

src/soc/nvidia/tegra132/ccplex.c

@@ -17,21 +17,21 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <string.h>
-#include <console/console.h>
 #include <arch/io.h>
 #include <cbfs.h>
-#include <timer.h>
+#include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
+#include <soc/clk_rst.h>
+#include <soc/ccplex.h>
 #include <soc/cpu.h>
+#include <soc/flow.h>
+#include <soc/mc.h>
+#include <soc/pmc.h>
+#include <soc/power.h>
 #include <soc/romstage.h>
-#include "clk_rst.h"
-#include "ccplex.h"
-#include "flow.h"
-#include "mc.h"
-#include "pmc.h"
-#include "power.h"
+#include <string.h>
+#include <timer.h>
 
 #define PMC_REGS (void *)(uintptr_t)(TEGRA_PMC_BASE)
 #define MTS_FILE_NAME "mts"

src/soc/nvidia/tegra132/clock.c

@@ -14,19 +14,19 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
+#include <arch/clock.h>
+#include <arch/io.h>
 #include <console/console.h>
 #include <delay.h>
-#include <arch/io.h>
-#include <soc/addressmap.h>
-#include <soc/clock.h>
 #include <stdlib.h>
-#include <arch/clock.h>
-#include "clk_rst.h"
-#include "clst_clk.h"
-#include "flow.h"
-#include "maincpu.h"
-#include "pmc.h"
-#include "sysctr.h"
+#include <soc/addressmap.h>
+#include <soc/clk_rst.h>
+#include <soc/clock.h>
+#include <soc/clst_clk.h>
+#include <soc/flow.h>
+#include <soc/maincpu.h>
+#include <soc/pmc.h>
+#include <soc/sysctr.h>
 
 static struct clst_clk_ctlr *clst_clk = (void *)TEGRA_CLUSTER_CLOCK_BASE;
 static struct flow_ctlr *flow = (void *)TEGRA_FLOW_BASE;

src/soc/nvidia/tegra132/cpu.c

@@ -17,12 +17,12 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
 #include <arch/io.h>
+#include <console/console.h>
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/cpu.h>
-#include "clk_rst.h"
-#include "pmc.h"
+#include <soc/pmc.h>
 
 #define EVP_CPU_RESET_VECTOR (void *)(uintptr_t)(TEGRA_EVP_BASE + 0x100)
 #define PMC_REGS (void *)(uintptr_t)(TEGRA_PMC_BASE)

src/soc/nvidia/tegra132/dma.c

@@ -16,15 +16,13 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <arch/io.h>
+#include <console/console.h>
 #include <inttypes.h>
+#include <soc/addressmap.h>
+#include <soc/dma.h>
 #include <stddef.h>
 #include <stdlib.h>
-#include <console/console.h>
-
-#include <arch/io.h>
-#include <soc/addressmap.h>
-
-#include "dma.h"
 
 struct apb_dma * const apb_dma = (struct apb_dma *)TEGRA_APB_DMA_BASE;
 

src/soc/nvidia/tegra132/funitcfg.c

@@ -19,11 +19,11 @@
 
 #include <arch/io.h>
 #include <soc/addressmap.h>
-#include <soc/funitcfg.h>
 #include <soc/clock.h>
+#include <soc/funitcfg.h>
+#include <soc/nvidia/tegra/usb.h>
 #include <soc/padconfig.h>
 #include <string.h>
-#include <soc/nvidia/tegra/usb.h>
 
 struct clk_dev_control {
 	uint32_t *clk_enb_set;

src/soc/nvidia/tegra132/i2c6.c

@@ -18,13 +18,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <delay.h>
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/clock.h>
-#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/power.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include "delay.h"
+#include <soc/padconfig.h>
+#include <soc/power.h>
 
 #define I2C6_BUS		5
 #define I2C6_PADCTL		0xC001

src/soc/nvidia/tegra132/include/soc/clock.h

@@ -21,7 +21,7 @@
 #include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
+#include <soc/clk_rst.h>
 #include <stdint.h>
 #include <stdlib.h>
 

src/soc/nvidia/tegra132/include/soc/funitcfg.h

@@ -20,10 +20,10 @@
 #ifndef __SOC_NVIDIA_TEGRA132_FUNIT_CFG_H
 #define __SOC_NVIDIA_TEGRA132_FUNIT_CFG_H
 
-#include <stdint.h>
-#include <soc/nvidia/tegra132/pinmux.h>
-#include <soc/padconfig.h>
 #include <soc/clock.h>
+#include <soc/padconfig.h>
+#include <soc/pinmux.h>
+#include <stdint.h>
 
 #define FUNIT_INDEX(_name)  FUNIT_##_name
 

src/soc/nvidia/tegra132/include/soc/gpio.h

@@ -20,6 +20,6 @@
 #ifndef __SOC_NVIDIA_TEGRA132_GPIO_H__
 #define __SOC_NVIDIA_TEGRA132_GPIO_H__
 
-#include <soc/nvidia/tegra132/pinmux.h>
+#include <soc/pinmux.h>
 
 #endif	/* __SOC_NVIDIA_TEGRA132_GPIO_H__ */

src/soc/nvidia/tegra132/include/soc/padconfig.h

@@ -21,7 +21,7 @@
 #define __SOC_NVIDIA_TEGRA132_PAD_CFG_H
 
 #include <stdint.h>
-#include <soc/nvidia/tegra132/pinmux.h>
+#include <soc/pinmux.h>
 
 struct pad_config {
 	uint8_t pinmux_flags;	/* PU/PU, OD, INPUT, SFIO, etc */

src/soc/nvidia/tegra132/include/soc/power.h

@@ -20,7 +20,7 @@
 #ifndef __SOC_NVIDIA_TEGRA132_POWER_H__
 #define __SOC_NVIDIA_TEGRA132_POWER_H__
 
-#include "pmc.h"
+#include <soc/pmc.h>
 
 void power_ungate_partition(uint32_t id);
 

src/soc/nvidia/tegra132/include/soc/sdram.h

@@ -20,7 +20,7 @@
 #ifndef __SOC_NVIDIA_TEGRA132_SDRAM_H__
 #define __SOC_NVIDIA_TEGRA132_SDRAM_H__
 
-#include "sdram_param.h"
+#include <soc/sdram_param.h>
 
 uint32_t sdram_get_ram_code(void);
 void sdram_init(const struct sdram_params *param);

src/soc/nvidia/tegra132/include/soc/sdram_configs.h

@@ -20,7 +20,7 @@
 #ifndef __SOC_NVIDIA_TEGRA132_SDRAM_CONFIGS_H__
 #define __SOC_NVIDIA_TEGRA132_SDRAM_CONFIGS_H__
 
-#include <soc/nvidia/tegra132/sdram.h>
+#include <soc/sdram.h>
 
 /* Loads SDRAM configurations for current system. */
 const struct sdram_params *get_sdram_config(void);

src/soc/nvidia/tegra132/include/soc/spi.h

@@ -18,11 +18,10 @@
 #ifndef __NVIDIA_TEGRA132_SPI_H__
 #define __NVIDIA_TEGRA132_SPI_H__
 
+#include <soc/dma.h>
 #include <spi-generic.h>
 #include <stddef.h>
 
-#include "dma.h"
-
 struct tegra_spi_regs {
 	u32 command1;		/* 0x000: SPI_COMMAND1 */
 	u32 command2;		/* 0x004: SPI_COMMAND2 */

src/soc/nvidia/tegra132/mmu_operations.c

@@ -17,13 +17,12 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/mmu.h>
+#include <memrange.h>
+#include <soc/addressmap.h>
+#include <soc/mmu_operations.h>
 #include <stdlib.h>
 #include <stdint.h>
-#include <memrange.h>
-
-#include <arch/mmu.h>
-#include "mmu_operations.h"
-#include <soc/addressmap.h>
 
 /* This structure keeps track of all the mmap memory ranges for t132 */
 static struct memranges t132_mmap_ranges;

src/soc/nvidia/tegra132/padconfig.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
 #include <arch/io.h>
 #include <soc/addressmap.h>
 #include <soc/padconfig.h>

src/soc/nvidia/tegra132/power.c

@@ -22,9 +22,8 @@
 #include <assert.h>
 #include <console/console.h>
 #include <soc/addressmap.h>
-
-#include "pmc.h"
-#include "power.h"
+#include <soc/pmc.h>
+#include <soc/power.h>
 
 static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE;
 

src/soc/nvidia/tegra132/ramstage.c

@@ -19,8 +19,8 @@
 
 #include <arch/stages.h>
 #include <soc/addressmap.h>
-#include "mmu_operations.h"
 #include <soc/clock.h>
+#include <soc/mmu_operations.h>
 
 void arm64_soc_init(void)
 {

src/soc/nvidia/tegra132/romstage.c

@@ -17,22 +17,20 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/exception.h>
 #include <arch/stages.h>
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/cbmem_console.h>
 #include <console/console.h>
-#include <timer.h>
-#include <arch/exception.h>
 #include <program_loading.h>
-
 #include <soc/addressmap.h>
-#include <soc/sdram_configs.h>
-#include "sdram.h"
-#include "ccplex.h"
-
+#include <soc/ccplex.h>
 #include <soc/clock.h>
+#include <soc/sdram.h>
+#include <soc/sdram_configs.h>
 #include <soc/romstage.h>
+#include <timer.h>
 
 void __attribute__((weak)) romstage_mainboard_init(void)
 {

src/soc/nvidia/tegra132/sdram.c

@@ -22,13 +22,12 @@
 #include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
+#include <soc/emc.h>
+#include <soc/mc.h>
+#include <soc/pmc.h>
+#include <soc/sdram.h>
 #include <stdlib.h>
 
-#include "emc.h"
-#include "mc.h"
-#include "pmc.h"
-#include "sdram.h"
-
 static void sdram_patch(uintptr_t addr, uint32_t value)
 {
 	if (addr)

src/soc/nvidia/tegra132/sdram_lp0.c

@@ -17,12 +17,11 @@
 
 #include <arch/cache.h>
 #include <console/console.h>
-#include <stdlib.h>
 #include <soc/addressmap.h>
-
-#include "clk_rst.h"
-#include "pmc.h"
-#include "sdram.h"
+#include <soc/clk_rst.h>
+#include <soc/pmc.h>
+#include <soc/sdram.h>
+#include <stdlib.h>
 
 /*
  * This function reads SDRAM parameters (and a few CLK_RST regsiter values) from

src/soc/nvidia/tegra132/secmon.c

@@ -19,8 +19,8 @@
 
 #include <arch/secmon.h>
 #include <console/console.h>
-#include "mmu_operations.h"
 #include <soc/addressmap.h>
+#include <soc/mmu_operations.h>
 
 static void soc_get_secure_mem(uint64_t *base, size_t *size)
 {

src/soc/nvidia/tegra132/soc.c

@@ -18,20 +18,21 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <string.h>
-#include <console/console.h>
-#include <device/device.h>
 #include <arch/io.h>
 #include <arch/cache.h>
 #include <arch/spintable.h>
 #include <cpu/cpu.h>
 #include <cbmem.h>
-#include <timer.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <console/console.h>
+#include <device/device.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/cpu.h>
 #include <soc/nvidia/tegra/apbmisc.h>
+#include <string.h>
+#include <timer.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
 #include "chip.h"
 
 static void soc_read_resources(device_t dev)

src/soc/nvidia/tegra132/spi.c

@@ -18,23 +18,23 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/cache.h>
+#include <arch/io.h>
 #include <assert.h>
 #include <cbfs.h>
+#include <console/console.h>
+#include <delay.h>
 #include <inttypes.h>
 #include <spi-generic.h>
 #include <spi_flash.h>
+#include <soc/addressmap.h>
+#include <soc/dma.h>
+#include <soc/spi.h>
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
 #include <timer.h>
-#include <arch/cache.h>
-#include <arch/io.h>
-#include <console/console.h>
-#include <soc/addressmap.h>
-#include <delay.h>
 
-#include "dma.h"
-#include "spi.h"
 
 #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI
 # define DEBUG_SPI(x,...)	printk(BIOS_DEBUG, "TEGRA_SPI: " x)

src/soc/nvidia/tegra132/uart.c

@@ -17,12 +17,12 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/uart.h>
 #include <arch/io.h>
 #include <boot/coreboot_tables.h>
 #include <console/console.h>	/* for __console definition */
-#include <stdint.h>
+#include <console/uart.h>
 #include <drivers/uart/uart8250reg.h>
+#include <stdint.h>
 
 /*
  * TODO: Use DRIVERS_UART_8250MEM driver instead.