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soc/qualcomm/sc7280: Move AOP load and reset handle to Romstage 

As AOP takes 500 msec delay to get up, moving aop load and reset to
romstage improves the performance.

BUG=b:218406702
TEST=reboot from AP console (on CRD3)
     prior to fix (from cbmem dump):
         1000:depthcharge start 1,139,809 (152,679)
     after fix (from cbmem dump):
         1000:depthcharge start 1,041,109 (46,353)

Signed-off-by: Sudheer Kumar Amrabadi <samrabad@codeaurora.org>
Change-Id: Iabc8ee8f6e7b14d237b0aeaae42da8077f9dafc4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
Sudheer Kumar Amrabadi 2022-09-16 12:09:19 +05:30 committed by Shelley Chen
parent 06d5b8b7fe
commit 9620ddc8f2
4 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/herobrine/romstage.c
View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/stages.h> #include <arch/stages.h>
#include <soc/aop_common.h>
#include <soc/cpucp.h> #include <soc/cpucp.h>
#include <soc/qclib_common.h> #include <soc/qclib_common.h>
#include <soc/shrm.h> #include <soc/shrm.h>
@ -25,6 +26,7 @@ void platform_romstage_main(void)
cpucp_prepare(); cpucp_prepare();
/* QCLib: DDR init & train */ /* QCLib: DDR init & train */
qclib_load_and_run(); qclib_load_and_run();
aop_fw_load_reset();
prepare_usb(); prepare_usb();
/* This rail needs to be stable by the time we take the FPMCU out of /* This rail needs to be stable by the time we take the FPMCU out of
reset in ramstage, so already turn it on here. This needs to happen reset in ramstage, so already turn it on here. This needs to happen

2
src/soc/qualcomm/sc7280/Makefile.inc
View File

@ -36,6 +36,7 @@ romstage-y += ../common/watchdog.c
romstage-y += mmu.c romstage-y += mmu.c
romstage-y += ../common/usb/usb.c romstage-y += ../common/usb/usb.c
romstage-y += carve_out.c romstage-y += carve_out.c
romstage-y += ../common/aop_load_reset.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c
################################################################################ ################################################################################
@ -46,7 +47,6 @@ ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c
ramstage-y += ../common/usb/usb.c ramstage-y += ../common/usb/usb.c
ramstage-y += ../common/usb/snps_usb_phy.c ramstage-y += ../common/usb/snps_usb_phy.c
ramstage-y += ../common/usb/qmpv4_usb_phy.c ramstage-y += ../common/usb/qmpv4_usb_phy.c
ramstage-y += ../common/aop_load_reset.c
ramstage-y += cpucp_load_reset.c ramstage-y += cpucp_load_reset.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_aux.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_aux.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_ctrl.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_ctrl.c

6
src/soc/qualcomm/sc7280/memlayout.ld
View File

@ -34,8 +34,7 @@ SECTIONS
REGION(pbl_timestamps, 0x14800000, 84K, 4K) REGION(pbl_timestamps, 0x14800000, 84K, 4K)
WATCHDOG_TOMBSTONE(0x14818FFC, 4) WATCHDOG_TOMBSTONE(0x14818FFC, 4)
BOOTBLOCK(0x14819000, 40K) BOOTBLOCK(0x14819000, 40K)
PRERAM_CBFS_CACHE(0x14823000, 70K) PRERAM_CBFS_CACHE(0x14823000, 102K)
PRERAM_CBMEM_CONSOLE(0x14834800, 32K)
TIMESTAMP(0x1483C800, 1K) TIMESTAMP(0x1483C800, 1K)
TTB(0x1483D000, 56K) TTB(0x1483D000, 56K)
STACK(0x1484B000, 16K) STACK(0x1484B000, 16K)
@ -49,7 +48,8 @@ SECTIONS
REGION(pmic, 0x14866000, 96K, 4K) REGION(pmic, 0x14866000, 96K, 4K)
REGION(ddr_training, 0x1487E000, 32K, 4K) REGION(ddr_training, 0x1487E000, 32K, 4K)
REGION(qclib, 0x14886000, 800K, 4K) REGION(qclib, 0x14886000, 800K, 4K)
BSRAM_END(0x14950000) PRERAM_CBMEM_CONSOLE(0x14950000, 32K)
BSRAM_END(0x14958000)
DRAM_START(0x80000000) DRAM_START(0x80000000)
/* Various hardware/software subsystems make use of this area */ /* Various hardware/software subsystems make use of this area */

2
src/soc/qualcomm/sc7280/soc.c
View File

@ -4,7 +4,6 @@
#include <soc/mmu.h> #include <soc/mmu.h>
#include <soc/mmu_common.h> #include <soc/mmu_common.h>
#include <soc/symbols_common.h> #include <soc/symbols_common.h>
#include <soc/aop_common.h>
#include <soc/cpucp.h> #include <soc/cpucp.h>
#include <soc/pcie.h> #include <soc/pcie.h>
@ -32,7 +31,6 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev) static void soc_init(struct device *dev)
{ {
aop_fw_load_reset();
cpucp_fw_load_reset(); cpucp_fw_load_reset();
} }