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src/include: add IS_ENABLED() around Kconfig symbol references 

Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Martin Roth 2017-06-24 14:13:53 -06:00
parent 1858d6a90a
commit 9634547eae
19 changed files with 28 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/cpu/amd/car.h
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@ -10,7 +10,8 @@ void post_cache_as_ram(void);
void cache_as_ram_switch_stack(void *stacktop);
void cache_as_ram_new_stack(void);
#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI || CONFIG_SOC_AMD_PI
#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI) || \
IS_ENABLED(CONFIG_SOC_AMD_PI)
void disable_cache_as_ram(void);
#endif

6
src/include/cpu/x86/lapic.h
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@ -7,7 +7,7 @@
#include <smp/node.h>
/* See if I need to initialize the local APIC */
#if CONFIG_SMP || CONFIG_IOAPIC
#if IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC)
# define NEED_LAPIC 1
#else
# define NEED_LAPIC 0
@ -54,7 +54,7 @@ static inline __attribute__((always_inline)) unsigned long lapicid(void)
return lapic_read(LAPIC_ID) >> 24;
}
#if !CONFIG_AP_IN_SIPI_WAIT
#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT)
/* If we need to go back to sipi wait, we use the long non-inlined version of
* this function in lapic_cpu_init.c
*/
@ -149,7 +149,7 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
void setup_lapic(void);
#if CONFIG_SMP
#if IS_ENABLED(CONFIG_SMP)
struct device;
int start_cpu(struct device *cpu);
#endif /* CONFIG_SMP */

2
src/include/cpu/x86/post_code.h
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@ -2,7 +2,7 @@
#include <console/post_codes.h>
#if CONFIG_POST_IO
#if IS_ENABLED(CONFIG_POST_IO)
#define post_code(value) \
movb $value, %al; \
outb %al, $CONFIG_POST_IO_PORT

4
src/include/cpu/x86/smm.h
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@ -479,7 +479,7 @@ int mainboard_io_trap_handler(int smif);
void southbridge_smi_set_eos(void);
#if CONFIG_SMM_TSEG
#if IS_ENABLED(CONFIG_SMM_TSEG)
void cpu_smi_handler(void);
void northbridge_smi_handler(void);
void southbridge_smi_handler(void);
@ -494,7 +494,7 @@ void mainboard_smi_gpi(u32 gpi_sts);
int mainboard_smi_apmc(u8 data);
void mainboard_smi_sleep(u8 slp_typ);
#if !CONFIG_SMM_TSEG
#if !IS_ENABLED(CONFIG_SMM_TSEG)
void smi_release_lock(void);
#endif

4
src/include/cpu/x86/tsc.h
View File

@ -3,9 +3,9 @@
#include <stdint.h>
#if CONFIG_TSC_SYNC_MFENCE
#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE)
#define TSC_SYNC "mfence\n"
#elif CONFIG_TSC_SYNC_LFENCE
#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE)
#define TSC_SYNC "lfence\n"
#else
#define TSC_SYNC

4
src/include/device/device.h
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@ -53,7 +53,7 @@ struct device_operations {
void (*disable)(device_t dev);
void (*set_link)(device_t dev, unsigned int link);
void (*reset_bus)(struct bus *bus);
#if CONFIG_GENERATE_SMBIOS_TABLES
#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
int (*get_smbios_data)(device_t dev, int *handle,
unsigned long *current);
void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t);
@ -163,7 +163,7 @@ extern struct bus *free_links;
extern const char mainboard_name[];
#if CONFIG_GFXUMA
#if IS_ENABLED(CONFIG_GFXUMA)
/* IGD UMA memory */
extern uint64_t uma_memory_base;
extern uint64_t uma_memory_size;

2
src/include/device/pci.h
View File

@ -15,7 +15,7 @@
#ifndef PCI_H
#define PCI_H
#if CONFIG_PCI
#if IS_ENABLED(CONFIG_PCI)
#include <stdint.h>
#include <stddef.h>

2
src/include/device/pci_ehci.h
View File

@ -29,7 +29,7 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port);
void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base);
#ifndef __PRE_RAM__
#if !CONFIG_USBDEBUG
#if !IS_ENABLED(CONFIG_USBDEBUG)
#define pci_ehci_read_resources pci_dev_read_resources
#else
/* Relocation of EHCI Debug Port BAR

2
src/include/elog.h
View File

@ -214,7 +214,7 @@ struct elog_event_mem_cache_update {
#define ELOG_EC_DEVICE_EVENT_DSP 0x02
#define ELOG_EC_DEVICE_EVENT_WIFI 0x03
#if CONFIG_ELOG
#if IS_ENABLED(CONFIG_ELOG)
/* Eventlog backing storage must be initialized before calling elog_init(). */
extern int elog_init(void);
extern int elog_clear(void);

2
src/include/option.h
View File

@ -6,7 +6,7 @@
* storage can be used. This will benefit machines without CMOS as well as those
* without a battery-backed CMOS (e.g. some laptops).
*/
#if CONFIG_USE_OPTION_TABLE
#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
#include <pc80/mc146818rtc.h>
#else
#include <types.h>

8
src/include/pc80/mc146818rtc.h
View File

@ -1,7 +1,7 @@
#ifndef PC80_MC146818RTC_H
#define PC80_MC146818RTC_H
#if CONFIG_ARCH_X86
#if IS_ENABLED(CONFIG_ARCH_X86)
#include <arch/io.h>
#include <types.h>
@ -193,8 +193,8 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size,
#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \
CMOS_VLEN_ ##name, (default))
#if CONFIG_CMOS_POST
#if CONFIG_USE_OPTION_TABLE
#if IS_ENABLED(CONFIG_CMOS_POST)
#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
# include "option_table.h"
# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
#else
@ -241,7 +241,7 @@ static inline void cmos_post_init(void)
/* Initialize to zero */
cmos_write(0, CMOS_POST_BANK_0_OFFSET);
cmos_write(0, CMOS_POST_BANK_1_OFFSET);
#if CONFIG_CMOS_POST_EXTRA
#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
#endif

2
src/include/smp/atomic.h
View File

@ -1,7 +1,7 @@
#ifndef SMP_ATOMIC_H
#define SMP_ATOMIC_H
#if CONFIG_SMP
#if IS_ENABLED(CONFIG_SMP)
#include <arch/smp/atomic.h>
#else

2
src/include/smp/node.h
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@ -1,7 +1,7 @@
#ifndef _SMP_NODE_H_
#define _SMP_NODE_H_
#if CONFIG_SMP
#if IS_ENABLED(CONFIG_SMP)
int boot_cpu(void);
#else
#define boot_cpu(x) 1

2
src/include/smp/spinlock.h
View File

@ -1,7 +1,7 @@
#ifndef SMP_SPINLOCK_H
#define SMP_SPINLOCK_H
#if CONFIG_SMP
#if IS_ENABLED(CONFIG_SMP)
#include <arch/smp/spinlock.h>
#else /* !CONFIG_SMP */

2
src/include/stddef.h
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@ -37,7 +37,7 @@ typedef unsigned int wint_t;
#endif
/* Work around non-writable data segment in execute-in-place romstage on x86. */
#if defined(__PRE_RAM__) && CONFIG_ARCH_X86
#if defined(__PRE_RAM__) && IS_ENABLED(CONFIG_ARCH_X86)
#define MAYBE_STATIC
#else
#define MAYBE_STATIC static

2
src/include/thread.h
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@ -21,7 +21,7 @@
#include <timer.h>
#include <arch/cpu.h>
#if CONFIG_COOP_MULTITASKING && !defined(__SMM__) && !defined(__PRE_RAM__)
#if IS_ENABLED(CONFIG_COOP_MULTITASKING) && !defined(__SMM__) && !defined(__PRE_RAM__)
struct thread {
int id;

2
src/include/timestamp.h
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@ -18,7 +18,7 @@
#include <commonlib/timestamp_serialized.h>
#if CONFIG_COLLECT_TIMESTAMPS && (CONFIG_EARLY_CBMEM_INIT \
#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) \
|| !defined(__PRE_RAM__))
/*
* timestamp_init() needs to be called once for each of these cases:

2
src/include/trace.h
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@ -25,7 +25,7 @@
#else /* !__PRE_RAM__ */
#if CONFIG_TRACE && !defined(__SMM__)
#if IS_ENABLED(CONFIG_TRACE) && !defined(__SMM__)
void __cyg_profile_func_enter(void *, void *)
__attribute__((no_instrument_function));

2
src/include/watchdog.h
View File

@ -1,7 +1,7 @@
#ifndef WATCHDOG_H
#define WATCHDOG_H
#if CONFIG_USE_WATCHDOG_ON_BOOT
#if IS_ENABLED(CONFIG_USE_WATCHDOG_ON_BOOT)
void watchdog_off(void);
#else
#define watchdog_off() { while (0); }