src/include: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -10,7 +10,8 @@ void post_cache_as_ram(void);
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void cache_as_ram_switch_stack(void *stacktop);
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void cache_as_ram_switch_stack(void *stacktop);
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void cache_as_ram_new_stack(void);
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void cache_as_ram_new_stack(void);
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#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI || CONFIG_SOC_AMD_PI
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#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI) || \
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IS_ENABLED(CONFIG_SOC_AMD_PI)
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void disable_cache_as_ram(void);
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void disable_cache_as_ram(void);
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#endif
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#endif
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@ -7,7 +7,7 @@
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#include <smp/node.h>
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#include <smp/node.h>
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/* See if I need to initialize the local APIC */
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/* See if I need to initialize the local APIC */
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#if CONFIG_SMP || CONFIG_IOAPIC
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#if IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC)
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# define NEED_LAPIC 1
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# define NEED_LAPIC 1
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#else
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#else
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# define NEED_LAPIC 0
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# define NEED_LAPIC 0
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@ -54,7 +54,7 @@ static inline __attribute__((always_inline)) unsigned long lapicid(void)
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return lapic_read(LAPIC_ID) >> 24;
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return lapic_read(LAPIC_ID) >> 24;
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}
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}
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#if !CONFIG_AP_IN_SIPI_WAIT
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#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT)
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/* If we need to go back to sipi wait, we use the long non-inlined version of
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/* If we need to go back to sipi wait, we use the long non-inlined version of
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* this function in lapic_cpu_init.c
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* this function in lapic_cpu_init.c
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*/
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*/
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@ -149,7 +149,7 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
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void setup_lapic(void);
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void setup_lapic(void);
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#if CONFIG_SMP
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#if IS_ENABLED(CONFIG_SMP)
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struct device;
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struct device;
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int start_cpu(struct device *cpu);
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int start_cpu(struct device *cpu);
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#endif /* CONFIG_SMP */
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#endif /* CONFIG_SMP */
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@ -2,7 +2,7 @@
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#include <console/post_codes.h>
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#include <console/post_codes.h>
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#if CONFIG_POST_IO
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#if IS_ENABLED(CONFIG_POST_IO)
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#define post_code(value) \
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#define post_code(value) \
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movb $value, %al; \
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movb $value, %al; \
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outb %al, $CONFIG_POST_IO_PORT
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outb %al, $CONFIG_POST_IO_PORT
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@ -479,7 +479,7 @@ int mainboard_io_trap_handler(int smif);
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void southbridge_smi_set_eos(void);
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void southbridge_smi_set_eos(void);
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#if CONFIG_SMM_TSEG
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#if IS_ENABLED(CONFIG_SMM_TSEG)
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void cpu_smi_handler(void);
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void cpu_smi_handler(void);
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void northbridge_smi_handler(void);
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void northbridge_smi_handler(void);
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void southbridge_smi_handler(void);
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void southbridge_smi_handler(void);
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@ -494,7 +494,7 @@ void mainboard_smi_gpi(u32 gpi_sts);
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int mainboard_smi_apmc(u8 data);
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int mainboard_smi_apmc(u8 data);
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void mainboard_smi_sleep(u8 slp_typ);
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void mainboard_smi_sleep(u8 slp_typ);
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#if !CONFIG_SMM_TSEG
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#if !IS_ENABLED(CONFIG_SMM_TSEG)
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void smi_release_lock(void);
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void smi_release_lock(void);
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#endif
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#endif
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@ -3,9 +3,9 @@
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#include <stdint.h>
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#include <stdint.h>
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#if CONFIG_TSC_SYNC_MFENCE
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#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE)
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#define TSC_SYNC "mfence\n"
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#define TSC_SYNC "mfence\n"
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#elif CONFIG_TSC_SYNC_LFENCE
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#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE)
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#define TSC_SYNC "lfence\n"
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#define TSC_SYNC "lfence\n"
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#else
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#else
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#define TSC_SYNC
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#define TSC_SYNC
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@ -53,7 +53,7 @@ struct device_operations {
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void (*disable)(device_t dev);
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void (*disable)(device_t dev);
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void (*set_link)(device_t dev, unsigned int link);
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void (*set_link)(device_t dev, unsigned int link);
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void (*reset_bus)(struct bus *bus);
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void (*reset_bus)(struct bus *bus);
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#if CONFIG_GENERATE_SMBIOS_TABLES
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#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
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int (*get_smbios_data)(device_t dev, int *handle,
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int (*get_smbios_data)(device_t dev, int *handle,
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unsigned long *current);
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unsigned long *current);
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void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t);
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void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t);
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@ -163,7 +163,7 @@ extern struct bus *free_links;
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extern const char mainboard_name[];
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extern const char mainboard_name[];
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#if CONFIG_GFXUMA
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#if IS_ENABLED(CONFIG_GFXUMA)
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/* IGD UMA memory */
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/* IGD UMA memory */
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extern uint64_t uma_memory_base;
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extern uint64_t uma_memory_base;
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extern uint64_t uma_memory_size;
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extern uint64_t uma_memory_size;
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@ -15,7 +15,7 @@
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#ifndef PCI_H
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#ifndef PCI_H
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#define PCI_H
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#define PCI_H
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#if CONFIG_PCI
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#if IS_ENABLED(CONFIG_PCI)
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#include <stdint.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <stddef.h>
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@ -29,7 +29,7 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port);
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void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base);
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void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base);
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#ifndef __PRE_RAM__
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#ifndef __PRE_RAM__
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#if !CONFIG_USBDEBUG
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#if !IS_ENABLED(CONFIG_USBDEBUG)
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#define pci_ehci_read_resources pci_dev_read_resources
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#define pci_ehci_read_resources pci_dev_read_resources
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#else
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#else
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/* Relocation of EHCI Debug Port BAR
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/* Relocation of EHCI Debug Port BAR
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@ -214,7 +214,7 @@ struct elog_event_mem_cache_update {
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#define ELOG_EC_DEVICE_EVENT_DSP 0x02
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#define ELOG_EC_DEVICE_EVENT_DSP 0x02
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#define ELOG_EC_DEVICE_EVENT_WIFI 0x03
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#define ELOG_EC_DEVICE_EVENT_WIFI 0x03
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#if CONFIG_ELOG
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#if IS_ENABLED(CONFIG_ELOG)
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/* Eventlog backing storage must be initialized before calling elog_init(). */
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/* Eventlog backing storage must be initialized before calling elog_init(). */
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extern int elog_init(void);
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extern int elog_init(void);
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extern int elog_clear(void);
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extern int elog_clear(void);
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@ -6,7 +6,7 @@
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* storage can be used. This will benefit machines without CMOS as well as those
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* storage can be used. This will benefit machines without CMOS as well as those
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* without a battery-backed CMOS (e.g. some laptops).
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* without a battery-backed CMOS (e.g. some laptops).
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*/
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*/
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#if CONFIG_USE_OPTION_TABLE
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#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
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#include <pc80/mc146818rtc.h>
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#include <pc80/mc146818rtc.h>
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#else
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#else
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#include <types.h>
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#include <types.h>
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@ -1,7 +1,7 @@
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#ifndef PC80_MC146818RTC_H
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#ifndef PC80_MC146818RTC_H
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#define PC80_MC146818RTC_H
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#define PC80_MC146818RTC_H
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#if CONFIG_ARCH_X86
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#if IS_ENABLED(CONFIG_ARCH_X86)
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#include <arch/io.h>
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#include <arch/io.h>
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#include <types.h>
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#include <types.h>
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@ -193,8 +193,8 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size,
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#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \
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#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \
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CMOS_VLEN_ ##name, (default))
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CMOS_VLEN_ ##name, (default))
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#if CONFIG_CMOS_POST
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#if IS_ENABLED(CONFIG_CMOS_POST)
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#if CONFIG_USE_OPTION_TABLE
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#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
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# include "option_table.h"
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# include "option_table.h"
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# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
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# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
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#else
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#else
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@ -241,7 +241,7 @@ static inline void cmos_post_init(void)
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/* Initialize to zero */
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/* Initialize to zero */
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cmos_write(0, CMOS_POST_BANK_0_OFFSET);
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cmos_write(0, CMOS_POST_BANK_0_OFFSET);
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cmos_write(0, CMOS_POST_BANK_1_OFFSET);
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cmos_write(0, CMOS_POST_BANK_1_OFFSET);
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#if CONFIG_CMOS_POST_EXTRA
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#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
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cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
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cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
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cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
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cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
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#endif
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#endif
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@ -1,7 +1,7 @@
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#ifndef SMP_ATOMIC_H
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#ifndef SMP_ATOMIC_H
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#define SMP_ATOMIC_H
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#define SMP_ATOMIC_H
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#if CONFIG_SMP
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#if IS_ENABLED(CONFIG_SMP)
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#include <arch/smp/atomic.h>
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#include <arch/smp/atomic.h>
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#else
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#else
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@ -1,7 +1,7 @@
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#ifndef _SMP_NODE_H_
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#ifndef _SMP_NODE_H_
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#define _SMP_NODE_H_
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#define _SMP_NODE_H_
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#if CONFIG_SMP
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#if IS_ENABLED(CONFIG_SMP)
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int boot_cpu(void);
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int boot_cpu(void);
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#else
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#else
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#define boot_cpu(x) 1
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#define boot_cpu(x) 1
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@ -1,7 +1,7 @@
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#ifndef SMP_SPINLOCK_H
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#ifndef SMP_SPINLOCK_H
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#define SMP_SPINLOCK_H
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#define SMP_SPINLOCK_H
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#if CONFIG_SMP
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#if IS_ENABLED(CONFIG_SMP)
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#include <arch/smp/spinlock.h>
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#include <arch/smp/spinlock.h>
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#else /* !CONFIG_SMP */
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#else /* !CONFIG_SMP */
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@ -37,7 +37,7 @@ typedef unsigned int wint_t;
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#endif
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#endif
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/* Work around non-writable data segment in execute-in-place romstage on x86. */
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/* Work around non-writable data segment in execute-in-place romstage on x86. */
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#if defined(__PRE_RAM__) && CONFIG_ARCH_X86
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#if defined(__PRE_RAM__) && IS_ENABLED(CONFIG_ARCH_X86)
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#define MAYBE_STATIC
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#define MAYBE_STATIC
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#else
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#else
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#define MAYBE_STATIC static
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#define MAYBE_STATIC static
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@ -21,7 +21,7 @@
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#include <timer.h>
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#include <timer.h>
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#include <arch/cpu.h>
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#include <arch/cpu.h>
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#if CONFIG_COOP_MULTITASKING && !defined(__SMM__) && !defined(__PRE_RAM__)
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#if IS_ENABLED(CONFIG_COOP_MULTITASKING) && !defined(__SMM__) && !defined(__PRE_RAM__)
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struct thread {
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struct thread {
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int id;
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int id;
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@ -18,7 +18,7 @@
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#include <commonlib/timestamp_serialized.h>
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#include <commonlib/timestamp_serialized.h>
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#if CONFIG_COLLECT_TIMESTAMPS && (CONFIG_EARLY_CBMEM_INIT \
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#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) \
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|| !defined(__PRE_RAM__))
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|| !defined(__PRE_RAM__))
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/*
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/*
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* timestamp_init() needs to be called once for each of these cases:
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* timestamp_init() needs to be called once for each of these cases:
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@ -25,7 +25,7 @@
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#else /* !__PRE_RAM__ */
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#else /* !__PRE_RAM__ */
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#if CONFIG_TRACE && !defined(__SMM__)
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#if IS_ENABLED(CONFIG_TRACE) && !defined(__SMM__)
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void __cyg_profile_func_enter(void *, void *)
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void __cyg_profile_func_enter(void *, void *)
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__attribute__((no_instrument_function));
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__attribute__((no_instrument_function));
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#ifndef WATCHDOG_H
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#ifndef WATCHDOG_H
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#define WATCHDOG_H
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#define WATCHDOG_H
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#if CONFIG_USE_WATCHDOG_ON_BOOT
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#if IS_ENABLED(CONFIG_USE_WATCHDOG_ON_BOOT)
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void watchdog_off(void);
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void watchdog_off(void);
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#else
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#else
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#define watchdog_off() { while (0); }
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#define watchdog_off() { while (0); }
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