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soc/intel/xeon_sp/spr: Drop spurious FADT fields 

Assigning duty_offset while duty_width==0 has no purpose.

Under intel/common/block, previous assignment for fadt->gpe0_blk
resolves GPE0_STS(0) from xeon_sp/ebg/.../soc_pm.h and also assigns
value matching pmbase + 0x60.

Change-Id: Iaf688d9471ac527ac20307cf16216abdab731a06
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74827
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2023-04-28 08:30:00 +03:00 committed by Matt DeVillier
parent effc28f23e
commit 9641c0e102
1 changed files with 0 additions and 2 deletions
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src/soc/intel/xeon_sp/spr/soc_acpi.c
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@ -47,8 +47,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER;
fadt->pm2_cnt_blk = pmbase + PM2_CNT;
fadt->pm2_cnt_len = 1;
fadt->gpe0_blk = pmbase + 0x60;
fadt->duty_offset = 1;
fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;