sb/bd82x6x: Don't rewrite over BCTRL

PCI_MIN_GNT is defined at offset 0x3e in <pci_def.h> which does not
apply to this PCI bridge because it is only defined for
"Header type 0 (normal devices)" (line 82).
Some lines obove that code line, the "write" on BCTRL is already done.

Change-Id: I8f1b98ba627947ab6652a4ba31d2acb159dd3e32
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32700
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/intel/bd82x6x/pci.c

@@ -47,9 +47,6 @@ static void pci_init(struct device *dev)
 	reg8 |= (0x04 << 3);
 	pci_write_config8(dev, SMLT, reg8);
 
-	/* Will this improve throughput of bus masters? */
-	pci_write_config8(dev, PCI_MIN_GNT, 0x06);
-
 	/* Clear errors in status registers */
 	reg16 = pci_read_config16(dev, PSTS);
 	//reg16 |= 0xf900;