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mb/asus/p5gc-mx: Fix and complete SIO devicetree options 

The devicetree lacks the 'chip' option for the Super I/O,
which causes the Super I/O related entries to be ignored.

This also adds other LDN that are present on this Super I/O.

Change-Id: Ida1b3c6575aa53bc7060070835c811665bdc1db1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17965
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Arthur Heymans 2016-12-25 17:52:15 +01:00 committed by Martin Roth
parent 1e7911e8aa
commit 9677fbfe51
1 changed files with 37 additions and 23 deletions
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60
src/mainboard/asus/p5gc-mx/devicetree.cb
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@ -85,29 +85,43 @@ chip northbridge/intel/i945
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
ioapic_irq 2 INTA 0x10 ioapic_irq 2 INTA 0x10
device pnp 2e.0 on # Floppy chip superio/winbond/w83627dhg
io 0x60 = 0x3f0 device pnp 2e.0 on # Floppy
irq 0x70 = 6 io 0x60 = 0x3f0
drq 0x74 = 2 irq 0x70 = 6
end drq 0x74 = 2
device pnp 2e.1 on # Parallel port end
io 0x60 = 0x378 device pnp 2e.1 on # Parallel port
irq 0x70 = 7 io 0x60 = 0x378
drq 0x74 = 3 irq 0x70 = 7
end drq 0x74 = 3
device pnp 2e.2 on # COM1 end
io 0x60 = 0x3f8 device pnp 2e.2 on # COM1
irq 0x70 = 4 io 0x60 = 0x3f8
end irq 0x70 = 4
device pnp 2e.3 on # COM2 end
io 0x60 = 0x2f8 device pnp 2e.3 on # COM2
irq 0x70 = 3 io 0x60 = 0x2f8
end irq 0x70 = 3
device pnp 2e.5 on # Keyboard end
io 0x60 = 0x60 device pnp 2e.5 on # Keyboard
io 0x62 = 0x64 io 0x60 = 0x60
irq 0x70 = 1 # Keyboard io 0x62 = 0x64
irq 0x72 = 12 # Mouse irq 0x70 = 1 # Keyboard
irq 0x72 = 12 # Mouse
end
device pnp 2e.6 off end # SPI
device pnp 2e.7 on end # GPIO6
device pnp 2e.8 off end # WDTO# & PLED
device pnp 2e.9 on end # GPIO2-5
device pnp 2e.a on # ACPI
irq 0x70 = 0
end
device pnp 2e.b on # HWM
io 0x60 = 0x290
irq 0x70 = 0
end
device pnp 2e.c on end # PECI, SST
end end
end end
device pci 1f.1 on # IDE device pci 1f.1 on # IDE