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mb/asus/p5gc-mx: Fix and complete SIO devicetree options 

The devicetree lacks the 'chip' option for the Super I/O,
which causes the Super I/O related entries to be ignored.

This also adds other LDN that are present on this Super I/O.

Change-Id: Ida1b3c6575aa53bc7060070835c811665bdc1db1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17965
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Arthur Heymans 2016-12-25 17:52:15 +01:00 committed by Martin Roth
parent 1e7911e8aa
commit 9677fbfe51
1 changed files with 37 additions and 23 deletions
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14
src/mainboard/asus/p5gc-mx/devicetree.cb
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@ -85,6 +85,7 @@ chip northbridge/intel/i945
device pci 1f.0 on # LPC bridge
ioapic_irq 2 INTA 0x10
chip superio/winbond/w83627dhg
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
@ -109,6 +110,19 @@ chip northbridge/intel/i945
irq 0x70 = 1 # Keyboard
irq 0x72 = 12 # Mouse
end
device pnp 2e.6 off end # SPI
device pnp 2e.7 on end # GPIO6
device pnp 2e.8 off end # WDTO# & PLED
device pnp 2e.9 on end # GPIO2-5
device pnp 2e.a on # ACPI
irq 0x70 = 0
end
device pnp 2e.b on # HWM
io 0x60 = 0x290
irq 0x70 = 0
end
device pnp 2e.c on end # PECI, SST
end
end
device pci 1f.1 on # IDE
ioapic_irq 2 INTB 0x11