riscv: fix non-SMP support

Use CONFIG_CPU_MAX which defaults to 1 instead of CONFIG_RISCV_HART_NUM.
The default value of CONFIG_RISCV_HART_NUM was 0 and cause a jump to address 0.
Add a die() call to fail gracefully.

Change-Id: I4e3aa09b787ae0f26a4aae375f4e5fcd745a0a1e
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/29993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <wxjstz@126.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

src/arch/riscv/Kconfig

@@ -33,8 +33,5 @@ config RISCV_USE_ARCH_TIMER
 	bool
 	default n
 
-config RISCV_HART_NUM
-	int
-
 config RISCV_WORKING_HARTID
 	int

src/arch/riscv/smp.c

@@ -55,7 +55,7 @@ void smp_pause(int working_hartid)
 		/* waiting for other Hart to enter the halt */
 		do {
 			barrier();
-		} while (SYNCB + 1 < CONFIG_RISCV_HART_NUM);
+		} while (SYNCB + 1 < CONFIG_MAX_CPUS);
 
 		/* initialize for the next call */
 		SYNCA = 0;
@@ -72,14 +72,17 @@ void smp_resume(void (*fn)(void *), void *arg)
 	if (fn == NULL)
 		die("must pass a non-null function pointer\n");
 
-	for (int i = 0; i < CONFIG_RISCV_HART_NUM; i++) {
+	for (int i = 0; i < CONFIG_MAX_CPUS; i++) {
 		OTHER_HLS(i)->entry.fn = fn;
 		OTHER_HLS(i)->entry.arg = arg;
 	}
 
-	for (int i = 0; i < CONFIG_RISCV_HART_NUM; i++)
+	for (int i = 0; i < CONFIG_MAX_CPUS; i++)
 		if (i != hartid)
 			set_msip(i, 1);
 
+	if (HLS()->entry.fn == NULL)
+		die("entry fn not set\n");
+
 	HLS()->entry.fn(HLS()->entry.arg);
 }

src/soc/sifive/fu540/Kconfig

@@ -39,7 +39,7 @@ config RISCV_CODEMODEL
 	string
 	default "medany"
 
-config RISCV_HART_NUM
+config MAX_CPUS
 	int
 	default 5