x86: Port x86 over to compile cleanly with x86-64
Change-Id: I26f1bbf027435be593f11bce4780111dcaf7cb86 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/10586 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer
parent
492a07593b
commit
9693885ad8
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@ -39,17 +39,74 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size)
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/* Jump to kernel */
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__asm__ __volatile__(
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" cld \n\t"
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#ifdef __x86_64__
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/* switch back to 32-bit mode */
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" push %4\n\t"
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" push %3\n\t"
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" push %2\n\t"
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" push %1\n\t"
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" push %0\n\t"
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".intel_syntax noprefix\n\t"
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/* use iret to switch to 32-bit code segment */
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" xor rax,rax\n\t"
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" mov ax, ss\n\t"
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" push rax\n\t"
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" mov rax, rsp\n\t"
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" add rax, 8\n\t"
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" push rax\n\t"
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" pushfq\n\t"
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" push 0x10\n\t"
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" lea rax,[rip+3]\n\t"
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" push rax\n\t"
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" iretq\n\t"
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".code32\n\t"
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/* disable paging */
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" mov eax, cr0\n\t"
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" btc eax, 31\n\t"
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" mov cr0, eax\n\t"
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/* disable long mode */
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" mov ecx, 0xC0000080\n\t"
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" rdmsr\n\t"
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" btc eax, 8\n\t"
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" wrmsr\n\t"
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" pop eax\n\t"
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" add esp, 4\n\t"
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" pop ebx\n\t"
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" add esp, 4\n\t"
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" pop ecx\n\t"
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" add esp, 4\n\t"
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" pop edx\n\t"
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" add esp, 4\n\t"
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" pop esi\n\t"
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" add esp, 4\n\t"
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".att_syntax prefix\n\t"
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#endif
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/* Save the callee save registers... */
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" pushl %%esi\n\t"
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" pushl %%edi\n\t"
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" pushl %%ebx\n\t"
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/* Save the parameters I was passed */
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#ifdef __x86_64__
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" pushl $0\n\t" /* 20 adjust */
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" pushl %%eax\n\t" /* 16 lb_start */
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" pushl %%ebx\n\t" /* 12 buffer */
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" pushl %%ecx\n\t" /* 8 lb_size */
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" pushl %%edx\n\t" /* 4 entry */
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" pushl %%esi\n\t" /* 0 elf_boot_notes */
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#else
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" pushl $0\n\t" /* 20 adjust */
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" pushl %0\n\t" /* 16 lb_start */
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" pushl %1\n\t" /* 12 buffer */
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" pushl %2\n\t" /* 8 lb_size */
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" pushl %3\n\t" /* 4 entry */
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" pushl %4\n\t" /* 0 elf_boot_notes */
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#endif
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/* Compute the adjustment */
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" xorl %%eax, %%eax\n\t"
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" subl 16(%%esp), %%eax\n\t"
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@ -115,7 +172,9 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size)
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" popl %%ebx\n\t"
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" popl %%edi\n\t"
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" popl %%esi\n\t"
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#ifdef __x86_64__
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".code64\n\t"
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#endif
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::
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"ri" (lb_start), "ri" (buffer), "ri" (lb_size),
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"ri" (entry),
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@ -140,7 +199,12 @@ void arch_prog_run(struct prog *prog)
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if (ENV_RAMSTAGE)
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try_payload(prog);
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__asm__ volatile (
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#ifdef __x86_64__
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"jmp *%%rdi\n"
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#else
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"jmp *%%edi\n"
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#endif
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:: "D"(prog_entry(prog))
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);
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}
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@ -26,7 +26,11 @@
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/* i386 lgdt argument */
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struct gdtarg {
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u16 limit;
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#ifdef __x86_64__
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u64 base;
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#else
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u32 base;
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#endif
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} __attribute__((packed));
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/* Copy GDT to new location and reload it.
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@ -35,7 +39,7 @@ struct gdtarg {
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static void move_gdt(int is_recovery)
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{
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void *newgdt;
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u16 num_gdt_bytes = (u32)&gdt_end - (u32)&gdt;
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u16 num_gdt_bytes = (uintptr_t)&gdt_end - (uintptr_t)&gdt;
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struct gdtarg gdtarg;
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newgdt = cbmem_find(CBMEM_ID_GDT);
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@ -49,7 +53,7 @@ static void move_gdt(int is_recovery)
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memcpy((void*)newgdt, &gdt, num_gdt_bytes);
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}
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gdtarg.base = (u32)newgdt;
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gdtarg.base = (uintptr_t)newgdt;
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gdtarg.limit = num_gdt_bytes - 1;
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__asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
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@ -73,7 +73,7 @@ static unsigned char smp_compute_checksum(void *v, int len)
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return checksum;
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}
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static void *smp_write_floating_table_physaddr(u32 addr, u32 mpf_physptr, unsigned int virtualwire)
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static void *smp_write_floating_table_physaddr(uintptr_t addr, uintptr_t mpf_physptr, unsigned int virtualwire)
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{
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struct intel_mp_floating *mf;
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void *v;
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@ -591,6 +591,7 @@ unsigned long __attribute__((weak)) write_smp_table(unsigned long addr)
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mptable_lintsrc(mc, isa_bus);
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tmp = mptable_finalize(mc);
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printk(BIOS_INFO, "MPTABLE len: %d\n", (unsigned int)tmp - (unsigned int)v);
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printk(BIOS_INFO, "MPTABLE len: %d\n", (unsigned int)((uintptr_t)tmp -
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(uintptr_t)v));
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return (unsigned long)tmp;
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}
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@ -24,7 +24,12 @@
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/* CR0 bits */
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#define PE (1 << 0)
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#ifdef __x86_64__
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.code64
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#else
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.code32
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#endif
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.globl __wakeup
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__wakeup:
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/* First prepare the jmp to the resume vector */
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@ -179,8 +179,14 @@ struct cpu_info {
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static inline struct cpu_info *cpu_info(void)
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{
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struct cpu_info *ci;
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__asm__("andl %%esp,%0; "
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__asm__(
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#ifdef __x86_64__
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"and %%rsp,%0; "
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"or %2, %0 "
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#else
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"andl %%esp,%0; "
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"orl %2, %0 "
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#endif
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:"=r" (ci)
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: "0" (~(CONFIG_STACK_SIZE - 1)),
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"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
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@ -3,5 +3,6 @@
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#define ROM_CODE_SEG 0x08
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#define ROM_DATA_SEG 0x10
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#define ROM_CODE_SEG64 0x18
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#endif /* ROM_SEGS_H */
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@ -27,7 +27,11 @@ void asmlinkage copy_and_run(void);
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static inline void stage_exit(void *entry)
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{
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__asm__ volatile (
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#ifdef __x86_64__
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"jmp *%%rdi\n"
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#else
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"jmp *%%edi\n"
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#endif
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:: "D"(entry)
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);
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}
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@ -17,20 +17,30 @@ thread_stacks:
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#endif
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.section ".text._start", "ax", @progbits
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#ifdef __x86_64__
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.code64
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#else
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.code32
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#endif
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.globl _start
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.globl __rmodule_entry
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__rmodule_entry:
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_start:
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cli
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lgdt %cs:gdtaddr
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#ifndef __x86_64__
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ljmp $0x10, $1f
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#endif
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1: movl $0x18, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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movl %eax, %fs
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movl %eax, %gs
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#ifdef __x86_64__
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mov $0x48, %ecx
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call SetCodeSelector
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#endif
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post_code(POST_ENTRY_C_START) /* post 13 */
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@ -54,11 +64,11 @@ _start:
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#if CONFIG_COOP_MULTITASKING
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/* Push the thread pointer. */
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pushl $0
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push $0
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#endif
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/* Push the cpu index and struct cpu */
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pushl $0
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pushl $0
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push $0
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push $0
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/* Initialize the Interrupt Descriptor table */
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leal _idt, %edi
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@ -76,7 +86,11 @@ _start:
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jne 1b
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/* Load the Interrupt descriptor table */
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#ifndef __x86_64__
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lidt idtarg
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#else
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// FIXME port table to x64 - lidt idtarg
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#endif
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/*
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* Now we are finished. Memory is up, data is copied and
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@ -97,122 +111,150 @@ _start:
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jmp .Lhlt
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vec0:
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pushl $0 /* error code */
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pushl $0 /* vector */
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push $0 /* error code */
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push $0 /* vector */
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jmp int_hand
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vec1:
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pushl $0 /* error code */
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pushl $1 /* vector */
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push $0 /* error code */
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push $1 /* vector */
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jmp int_hand
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vec2:
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pushl $0 /* error code */
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pushl $2 /* vector */
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push $0 /* error code */
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push $2 /* vector */
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jmp int_hand
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vec3:
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pushl $0 /* error code */
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pushl $3 /* vector */
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push $0 /* error code */
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push $3 /* vector */
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jmp int_hand
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vec4:
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pushl $0 /* error code */
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pushl $4 /* vector */
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push $0 /* error code */
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push $4 /* vector */
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jmp int_hand
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vec5:
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pushl $0 /* error code */
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pushl $5 /* vector */
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push $0 /* error code */
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push $5 /* vector */
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jmp int_hand
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vec6:
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pushl $0 /* error code */
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pushl $6 /* vector */
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push $0 /* error code */
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push $6 /* vector */
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jmp int_hand
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vec7:
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pushl $0 /* error code */
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pushl $7 /* vector */
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push $0 /* error code */
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push $7 /* vector */
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jmp int_hand
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vec8:
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/* error code */
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pushl $8 /* vector */
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push $8 /* vector */
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jmp int_hand
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.word 0x9090
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vec9:
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pushl $0 /* error code */
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pushl $9 /* vector */
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push $0 /* error code */
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push $9 /* vector */
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jmp int_hand
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vec10:
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/* error code */
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pushl $10 /* vector */
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push $10 /* vector */
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jmp int_hand
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.word 0x9090
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vec11:
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/* error code */
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pushl $11 /* vector */
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push $11 /* vector */
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jmp int_hand
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.word 0x9090
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vec12:
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/* error code */
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pushl $12 /* vector */
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push $12 /* vector */
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jmp int_hand
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.word 0x9090
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vec13:
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/* error code */
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pushl $13 /* vector */
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push $13 /* vector */
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jmp int_hand
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.word 0x9090
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vec14:
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/* error code */
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pushl $14 /* vector */
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push $14 /* vector */
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jmp int_hand
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.word 0x9090
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vec15:
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pushl $0 /* error code */
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pushl $15 /* vector */
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push $0 /* error code */
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push $15 /* vector */
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jmp int_hand
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vec16:
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pushl $0 /* error code */
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pushl $16 /* vector */
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push $0 /* error code */
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push $16 /* vector */
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jmp int_hand
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vec17:
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/* error code */
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pushl $17 /* vector */
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push $17 /* vector */
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jmp int_hand
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.word 0x9090
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vec18:
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pushl $0 /* error code */
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pushl $18 /* vector */
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push $0 /* error code */
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push $18 /* vector */
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jmp int_hand
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vec19:
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pushl $0 /* error code */
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pushl $19 /* vector */
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push $0 /* error code */
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push $19 /* vector */
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jmp int_hand
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int_hand:
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/* At this point on the stack there is:
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/* At this point, on x86-32, on the stack there is:
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* 0(%esp) vector
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* 4(%esp) error code
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* 8(%esp) eip
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* 12(%esp) cs
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* 16(%esp) eflags
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*/
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#ifdef __x86_64__
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push %rdi
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push %rsi
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push %rbp
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/* Original stack pointer */
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lea 32(%rsp), %rbp
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push %rbp
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push %rbx
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push %rdx
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push %rcx
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push %rax
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push %rsp /* Pointer to structure on the stack */
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call x86_exception
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pop %rax /* Drop the pointer */
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pop %rax
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pop %rcx
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pop %rdx
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pop %rbx
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pop %rbp /* Ignore saved %rsp value */
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pop %rbp
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pop %rsi
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pop %rdi
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add $8, %rsp /* pop of the vector and error code */
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#else
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pushl %edi
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pushl %esi
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pushl %ebp
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/* Original stack pointer */
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leal 32(%esp), %ebp
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pushl %ebp
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@ -235,6 +277,7 @@ int_hand:
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popl %edi
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addl $8, %esp /* pop of the vector and error code */
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#endif
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iret
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@ -242,21 +285,33 @@ int_hand:
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.globl gdb_stub_breakpoint
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gdb_stub_breakpoint:
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#ifdef __x86_64__
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pop %rax /* Return address */
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pushfl
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push %cs
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push %rax /* Return address */
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push $0 /* No error code */
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push $32 /* vector 32 is user defined */
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#else
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popl %eax /* Return address */
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pushfl
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pushl %cs
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pushl %eax /* Return address */
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pushl $0 /* No error code */
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pushl $32 /* vector 32 is user defined */
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#endif
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jmp int_hand
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#endif
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.globl gdt, gdt_end, idtarg
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gdtaddr:
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.word gdt_end - gdt - 1
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#ifdef __x86_64__
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.quad gdt
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#else
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.long gdt /* we know the offset */
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#endif
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.data
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@ -287,7 +342,11 @@ gdt:
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/* selgdt 0x18, flat data segment */
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.word 0xffff, 0x0000
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#ifdef __x86_64__
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.byte 0x00, 0x92, 0xcf, 0x00
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#else
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.byte 0x00, 0x93, 0xcf, 0x00
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#endif
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/* selgdt 0x20, unused */
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.word 0x0000, 0x0000 /* dummy */
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@ -312,6 +371,12 @@ gdt:
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/* selgdt 0x40, flat code segment 16 bit */
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.word 0xffff, 0x0000
|
||||
.byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
|
||||
|
||||
#ifdef __x86_64__
|
||||
/* selgdt 0x48, flat x64 code segment */
|
||||
.word 0xffff, 0x0000
|
||||
.byte 0x00, 0x9b, 0xaf, 0x00
|
||||
#endif
|
||||
gdt_end:
|
||||
|
||||
idtarg:
|
||||
|
|
@ -322,5 +387,35 @@ _idt:
|
|||
.fill 20, 8, 0 # idt is uninitialized
|
||||
_idt_end:
|
||||
|
||||
#ifdef __x86_64__
|
||||
SetCodeSelector:
|
||||
.intel_syntax noprefix
|
||||
|
||||
# save rsp because iret will align it to a 16 byte boundary
|
||||
mov rdx, rsp
|
||||
|
||||
# use iret to jump to a 64-bit offset in a new code segment
|
||||
# iret will pop cs:rip, flags, then ss:rsp
|
||||
mov ax, ss # need to push ss..
|
||||
push rax # push ss instuction not valid in x64 mode, so use ax
|
||||
push rsp
|
||||
pushfq
|
||||
push rcx # cx is code segment selector from caller
|
||||
mov rax, offset setCodeSelectorLongJump
|
||||
push rax
|
||||
|
||||
# the iret will continue at next instruction, with the new cs value loaded
|
||||
iretq
|
||||
|
||||
setCodeSelectorLongJump:
|
||||
# restore rsp, it might not have been 16-byte aligned on entry
|
||||
mov rsp, rdx
|
||||
ret
|
||||
.att_syntax prefix
|
||||
|
||||
.previous
|
||||
.code64
|
||||
#else
|
||||
.previous
|
||||
.code32
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <device/device.h>
|
||||
#include <smp/spinlock.h>
|
||||
|
||||
#ifndef __x86_64__
|
||||
/* Standard macro to see if a specific flag is changeable */
|
||||
static inline int flag_is_changeable_p(uint32_t flag)
|
||||
{
|
||||
|
|
@ -78,6 +79,7 @@ static int deep_magic_nexgen_probe(void)
|
|||
: "=a" (ret) : : "cx", "dx" );
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* List of cpu vendor strings along with their normalized
|
||||
* id values.
|
||||
|
|
@ -131,6 +133,7 @@ static void identify_cpu(struct device *cpu)
|
|||
|
||||
vendor_name[0] = '\0'; /* Unset */
|
||||
|
||||
#ifndef __x86_64__
|
||||
/* Find the id and vendor_name */
|
||||
if (!cpu_have_cpuid()) {
|
||||
/* Its a 486 if we can modify the AC flag */
|
||||
|
|
@ -148,6 +151,7 @@ static void identify_cpu(struct device *cpu)
|
|||
memcpy(vendor_name, "NexGenDriven", 13);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
if (cpu_have_cpuid()) {
|
||||
int cpuid_level;
|
||||
struct cpuid_result result;
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <device/device.h>
|
||||
#include <smp/spinlock.h>
|
||||
|
||||
#ifndef __x86_64__
|
||||
/* Standard macro to see if a specific flag is changeable */
|
||||
static inline int flag_is_changeable_p(uint32_t flag)
|
||||
{
|
||||
|
|
@ -37,6 +38,14 @@ int cpu_have_cpuid(void)
|
|||
return flag_is_changeable_p(X86_EFLAGS_ID);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
int cpu_have_cpuid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
int cpu_cpuid_extended_level(void)
|
||||
{
|
||||
return cpuid_eax(0x80000000);
|
||||
|
|
|
|||
|
|
@ -40,8 +40,8 @@ void setup_ebda(u32 low_memory_size, u16 ebda_segment, u16 ebda_size)
|
|||
write16(X86_EBDA_SEGMENT, ebda_segment);
|
||||
|
||||
/* Set up EBDA */
|
||||
memset((void *)(ebda_segment << 4), 0, ebda_size);
|
||||
write16((void*)(ebda_segment << 4), (ebda_size >> 10));
|
||||
memset((void *)((uintptr_t)ebda_segment << 4), 0, ebda_size);
|
||||
write16((void*)((uintptr_t)ebda_segment << 4), (ebda_size >> 10));
|
||||
}
|
||||
|
||||
void setup_default_ebda(void)
|
||||
|
|
|
|||
|
|
@ -494,16 +494,16 @@ void x86_exception(struct eregs *info)
|
|||
info->error_code, info->eflags,
|
||||
info->eax, info->ebx, info->ecx, info->edx,
|
||||
info->edi, info->esi, info->ebp, info->esp);
|
||||
u8 *code = (u8*)((u32)info->eip - (MDUMP_SIZE >>1));
|
||||
u8 *code = (u8*)((uintptr_t)info->eip - (MDUMP_SIZE >>1));
|
||||
/* Align to 8-byte boundary please, and print eight bytes per row.
|
||||
* This is done to make DRAM burst timing/reordering errors more
|
||||
* evident from the looking at the dump */
|
||||
code = (u8*)((u32)code & ~0x7);
|
||||
code = (u8*)((uintptr_t)code & ~0x7);
|
||||
int i;
|
||||
for(i = 0; i < MDUMP_SIZE; i++)
|
||||
{
|
||||
if( (i & 0x07) == 0 )
|
||||
printk(BIOS_EMERG, "\n%.8x:\t", (int)code + i );
|
||||
printk(BIOS_EMERG, "\n%p:\t", code + i);
|
||||
printk(BIOS_EMERG, "%.2x ", code[i]);
|
||||
}
|
||||
die("");
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
*/
|
||||
|
||||
#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK) \
|
||||
((void *)((CONFIG_MMCONF_BASE_ADDRESS |\
|
||||
((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\
|
||||
(((SEGBUS) & 0xFFF) << 20) |\
|
||||
(((DEVFN) & 0xFF) << 12) |\
|
||||
((WHERE) & 0xFFF)) & ~MASK))
|
||||
|
|
|
|||
Loading…
Reference in New Issue