mb/google/octopus/variants/fleex: Update Charger throttling settings
Update dptf settings for Charger throttling. Also, update Power Limit1 minimum value setting from 4.5W to 3W. BUG=b:112448519 BRANCH=octopus TEST=Built and tested on Fleex system Change-Id: I8c2a796ff28254ebef28ed5745b344f925d6e649 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/30080 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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@ -26,6 +26,8 @@
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#define DPTF_TSR2_PASSIVE 53
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#define DPTF_TSR2_PASSIVE 53
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#define DPTF_TSR2_CRITICAL 127
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#define DPTF_TSR2_CRITICAL 127
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#define DPTF_ENABLE_CHARGER
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/* Charger performance states, board-specific values from charger and EC */
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/* Charger performance states, board-specific values from charger and EC */
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Name (CHPS, Package () {
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Name (CHPS, Package () {
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Package () { 0, 0, 0, 0, 255, 0xBB8, "mA", 0 }, /* 3A (MAX) */
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Package () { 0, 0, 0, 0, 255, 0xBB8, "mA", 0 }, /* 3A (MAX) */
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@ -42,8 +44,10 @@ Name (DTRT, Package () {
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/* CPU Effect on Temp Sensor 1 */
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/* CPU Effect on Temp Sensor 1 */
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Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 },
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Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 },
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/* CPU Effect on Temp Sensor 2 */
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#ifdef DPTF_ENABLE_CHARGER
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Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 200, 300, 0, 0, 0, 0 },
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/* Charger Effect on Temp Sensor 2 */
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 300, 0, 0, 0, 0 },
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#endif
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})
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})
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Name (MPPC, Package ()
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Name (MPPC, Package ()
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@ -51,7 +55,7 @@ Name (MPPC, Package ()
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0x2, /* Revision */
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0x2, /* Revision */
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Package () { /* Power Limit 1 */
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Package () { /* Power Limit 1 */
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0, /* PowerLimitIndex, 0 for Power Limit 1 */
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0, /* PowerLimitIndex, 0 for Power Limit 1 */
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4500, /* PowerLimitMinimum */
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3000, /* PowerLimitMinimum */
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10000, /* PowerLimitMaximum */
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10000, /* PowerLimitMaximum */
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1000, /* TimeWindowMinimum */
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1000, /* TimeWindowMinimum */
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1000, /* TimeWindowMaximum */
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1000, /* TimeWindowMaximum */
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