diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h
index 8c195781d1..3b524c310c 100644
--- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h
+++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h
@@ -11,7 +11,7 @@
 
 #define EMBEDDED_FW_SIGNATURE			0x55aa55aa
 #define PSP_COOKIE				0x50535024	/* 'PSP$' */
-#define BDT1_COOKIE				0x44484224	/* 'DHB$ */
+#define BHD_COOKIE				0x44484224	/* 'DHB$ */
 
 #define PSP_VBOOT_ERROR_SUBCODE			0x0D5D0000
 
@@ -31,7 +31,7 @@
 #define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR	0xC3
 #define POSTCODE_ROMSIG_MISMATCH_ERROR		0xC4
 #define POSTCODE_PSP_COOKIE_MISMATCH_ERROR	0xC5
-#define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR	0xC6
+#define POSTCODE_BHD_COOKIE_MISMATCH_ERROR	0xC6
 #define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR	0xC7
 #define POSTCODE_FMAP_REGION_MISSING		0xC8
 #define POSTCODE_AMD_FW_MISSING			0xC9
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index d64c257edf..33733848ef 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -110,9 +110,9 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
 		printk(BIOS_ERR, "PSP Directory address is not correct.\n");
 		return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
 	}
-	if (*bios_dir_in_spi != BDT1_COOKIE) {
+	if (*bios_dir_in_spi != BHD_COOKIE) {
 		printk(BIOS_ERR, "BIOS Directory address is not correct.\n");
-		return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
+		return POSTCODE_BHD_COOKIE_MISMATCH_ERROR;
 	}
 
 	/* EFS2 uses relative address and PSP isn't happy with that */
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index af89cadb20..f09a5a8438 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -492,8 +492,8 @@ static void fill_dir_header(void *directory, uint32_t count, uint32_t cookie, co
 					+ sizeof(dir->header.num_entries)
 					+ sizeof(dir->header.additional_info));
 		break;
-	case BDT1_COOKIE:
-	case BDT2_COOKIE:
+	case BHD_COOKIE:
+	case BHDL2_COOKIE:
 		table_size = ctx->current - ctx->current_table;
 		if ((table_size % TABLE_ALIGNMENT) != 0) {
 			fprintf(stderr, "The BIOS table size should be 4K aligned\n");
@@ -1005,7 +1005,7 @@ static void integrate_bios_firmwares(context *ctx,
 	 */
 	if (!cb_config->multi_level)
 		level = BDT_BOTH;
-	else if (cookie == BDT2_COOKIE)
+	else if (cookie == BHDL2_COOKIE)
 		level = BDT_LVL2;
 	else if (biosdir2)
 		level = BDT_LVL1;
@@ -1926,12 +1926,12 @@ int main(int argc, char **argv)
 			biosdir2 = new_bios_dir(&ctx, cb_config.multi_level);
 
 			integrate_bios_firmwares(&ctx, biosdir2, NULL,
-						amd_bios_table, BDT2_COOKIE, &cb_config);
+						amd_bios_table, BHDL2_COOKIE, &cb_config);
 			if (cb_config.recovery_ab) {
 				if (pspdir2_b != NULL) {
 					biosdir2_b = new_bios_dir(&ctx, cb_config.multi_level);
 					integrate_bios_firmwares(&ctx, biosdir2_b, NULL,
-						amd_bios_table, BDT2_COOKIE, &cb_config);
+						amd_bios_table, BHDL2_COOKIE, &cb_config);
 				}
 				add_psp_firmware_entry(&ctx, pspdir2, biosdir2,
 					AMD_FW_BIOS_TABLE, TABLE_ALIGNMENT);
@@ -1941,13 +1941,13 @@ int main(int argc, char **argv)
 			} else {
 				biosdir = new_bios_dir(&ctx, cb_config.multi_level);
 				integrate_bios_firmwares(&ctx, biosdir, biosdir2,
-						amd_bios_table, BDT1_COOKIE, &cb_config);
+						amd_bios_table, BHD_COOKIE, &cb_config);
 			}
 		} else {
-			/* flat: BDT1 cookie and no pointer to 2nd table */
+			/* flat: BHD1 cookie and no pointer to 2nd table */
 			biosdir = new_bios_dir(&ctx, cb_config.multi_level);
 			integrate_bios_firmwares(&ctx, biosdir, NULL,
-						amd_bios_table, BDT1_COOKIE, &cb_config);
+						amd_bios_table, BHD_COOKIE, &cb_config);
 		}
 		switch (soc_id) {
 		case PLATFORM_RENOIR:
diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h
index 22386386c9..dbce39282c 100644
--- a/util/amdfwtool/amdfwtool.h
+++ b/util/amdfwtool/amdfwtool.h
@@ -252,8 +252,8 @@ typedef struct _ish_directory_table {
 #define PSP_COOKIE 0x50535024		/* 'PSP$' */
 #define PSPL2_COOKIE 0x324c5024		/* '2LP$' */
 #define PSP2_COOKIE 0x50535032		/* 'PSP2' */
-#define BDT1_COOKIE 0x44484224		/* 'DHB$ */
-#define BDT2_COOKIE 0x324c4224		/* '2LB$ */
+#define BHD_COOKIE 0x44484224		/* 'DHB$ */
+#define BHDL2_COOKIE 0x324c4224		/* '2LB$ */
 
 #define PSP_LVL1 (1 << 0)
 #define PSP_LVL2 (1 << 1)