soc/intel/skylake: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says: BIOS implementations must report these remapping structure types in numerical order. i.e., All remapping structures of type 0 (DRHD) enumerated before remapping structures of type 1 (RMRR), and so forth. So, update the corresponding code to adhere to the specification. Change-Id: I2446d536603559f637f3f8b1b44e9d712aa35492 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -425,22 +425,19 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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const bool gfxvten = MCHBAR32(GFXVTBAR) & 1;
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/* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */
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if (igfx_dev && igfx_dev->enabled && gfxvten &&
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gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) {
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unsigned long tmp = current;
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const bool emit_igd =
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igfx_dev && igfx_dev->enabled &&
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gfx_vtbar && gfxvten &&
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!MCHBAR32(GFXVTBAR + 4);
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/* First, add DRHD entries */
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if (emit_igd) {
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const unsigned long tmp = current;
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current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
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current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
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acpi_dmar_drhd_fixup(tmp, current);
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/* Add RMRR entry */
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tmp = current;
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current += acpi_create_dmar_rmrr(current, 0,
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sa_get_gsm_base(), sa_get_tolud_base() - 1);
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current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
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acpi_dmar_rmrr_fixup(tmp, current);
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}
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const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff;
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@ -461,6 +458,16 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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acpi_dmar_drhd_fixup(tmp, current);
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}
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/* Then, add RMRR entries after all DRHD entries */
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if (emit_igd) {
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const unsigned long tmp = current;
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current += acpi_create_dmar_rmrr(current, 0,
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sa_get_gsm_base(), sa_get_tolud_base() - 1);
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current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
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acpi_dmar_rmrr_fixup(tmp, current);
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}
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return current;
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}
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