soc/intel/cmn/block/pmc: Add pmc_or_mmio32 utility function

Change-Id: I5f9845dd3ea098d990710eaaa2d5db495f876cdd
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Tim Chu 2022-12-08 10:12:18 +00:00 committed by Felix Held
parent ef72defdce
commit 96b49b5acb
2 changed files with 13 additions and 0 deletions

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@ -135,6 +135,8 @@ void pmc_disable_all_gpe(void);
/* Clear STD and GPIO GPE status registers. */ /* Clear STD and GPIO GPE status registers. */
void pmc_clear_all_gpe_status(void); void pmc_clear_all_gpe_status(void);
/* Write PMC MMIO register value with the provided bitmask. */
void pmc_or_mmio32(uint32_t offset, uint32_t ormask);
/* Clear status bits in Power and Reset Status (PRSTS) register */ /* Clear status bits in Power and Reset Status (PRSTS) register */
void pmc_clear_prsts(void); void pmc_clear_prsts(void);

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@ -367,6 +367,17 @@ void soc_clear_pm_registers(uintptr_t pmc_bar)
{ {
} }
void pmc_or_mmio32(uint32_t offset, uint32_t ormask)
{
uint32_t reg;
uintptr_t pmc_bar;
pmc_bar = soc_read_pmc_base();
reg = read32p(pmc_bar + offset);
reg |= ormask;
write32p(pmc_bar + offset, reg);
}
void pmc_clear_prsts(void) void pmc_clear_prsts(void)
{ {
uint32_t prsts; uint32_t prsts;