Documentation: Add FSP bugs
As Intel doesn't even document known bugs add a list of FSP bugs here. Change-Id: I07819b83fb0c9437fc237472dfe943f78738347a Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34239 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This section contains documentation about Intel-FSP in public domain.
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## Bugs
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As Intel doesn't even list known bugs, they are collected here until
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those are fixed. If possible a workaround is described here as well.
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### BroadwellDEFsp
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* IA32_FEATURE_CONTROL MSR is locked in FSP-M
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* Release MR2
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* Writing the MSR is required in ramstage for Intel TXT
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* Workaround: none
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* Issue on public tracker: [Issue 10]
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* FSP-S asserts if the thermal PCI device 00:1f.6 is disabled
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* Release MR2
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* FSP expects the PCI device to be enabled
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* FSP expects BARs to be properly assigned
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* Workaround: Don't disable this PCI device
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* Issue on public tracker: [Issue 13]
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### KabylakeFsp
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* MfgId and ModulePartNum in the DIMM_INFO struct are empty
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* Release 3.7.1
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* Those values are typically consumed by SMBIOS type 17
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* Workaround: none
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* Issue on public tracker: [Issue 22]
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### BraswellFsp
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* Internal UART can't be disabled using PcdEnableHsuart*
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* Release MR2
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* Workaround: Disable internal UART manually after calling FSP
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* Issue on public tracker: [Issue 10]
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## Open Source Intel FSP specification
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* [About Intel FSP](https://firmware.intel.com/learn/fsp/about-intel-fsp)
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## Additional Features in FSP 2.1 specification
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- [PPI](ppi/ppi.md)
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## Official bugtracker
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- [IntelFSP/FSP](https://github.com/IntelFsp/FSP/issues)
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[Issue 10]: https://github.com/IntelFsp/FSP/issues/10
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[Issue 13]: https://github.com/IntelFsp/FSP/issues/13
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[Issue 15]: https://github.com/IntelFsp/FSP/issues/15
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[Issue 22]: https://github.com/IntelFsp/FSP/issues/22
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